
IW4027B
1.34 ±0.03
14
15
Chip marking
402720
(x=0.093, y=0.5825) 16
13 12 11 10
09
08
01
02
CHIP PAD DIAGRAM IZ4027B
07
03 04 05 06
Pad size 0.100 x 0.100 mm (Pad size is given as per passivation layer)
Thickness of chip 0.46 ± 0.02 mm
PAD LOCATION
Pad No
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
Symbol
Q2
Q2
Clock 2
Reset 2
K2
J2
Set 2
GND
Set 1
J1
K1
Reset 1
Clock 1
Q1
Q1
Vcc
X
0.116
0.111
0.474
0.6555
0.8335
1.124
1.124
1.1245
1.124
1.124
0.8335
0.6555
0.474
0.111
0.116
0.116
Y
0.4215
0.126
0.1755
0.1755
0.174
0.1235
0.4065
0.6855
0.9335
1.2165
1.166
1.1645
1.1645
1.214
0.9185
0.7365
INTEGRAL
6