LC83026E
Continued from preceding page.
Pin
Pin No. I/O
Function
DVDD1 to 3 17, 18, 72 — Digital block VDD (Must be connected to +5 V.)
<Make connections as short as possible so that no potential differences occur between any of the VDD pins.>
DVSS1 to 3 21, 48, 73 — Digital block VSS (Must be connected to ground.)
<Make connections as short as possible so that no potential differences occur between any of the VSS pins.>
ADLVDD
35
— A/D converter VDD (left channel) (Connect to +5 V.)
ADRVDD
41
— A/D converter VDD (right channel) (Connect to +5 V.)
ADMVDD
46
— A/D converter VDD (microphone) (Connect to +5 V.)
DALVDD
24
— D/A converter VDD (left channel) (Connect to +5 V.)
DARVDD
31
— D/A converter VDD (right channel) (Connect to +5 V.)
Design the wiring so that potential differences do
not occur between the analog system VDD pins and
either other analog system VDD pins or the digital
system VDD pins.
ADLVSS
33
— A/D converter VSS (left channel) (Connect to ground.)
ADRVSS
39
— A/D converter VSS (right channel) (Connect to ground.) Design the wiring so that potential differences do
ADMVSS
44
— A/D converter VSS (microphone) (Connect to ground.)
not occur between the analog system VSS pins and
DALVSS
27
— D/A converter VSS (left channel) (Connect to ground.)
either other analog system VSS pins or the digital
system VSS pins.
DARVSS
28
— D/A converter VSS (right channel) (Connect to ground.)
Pin Circuits
Pins
Specifications
ASO, LRCKO, BCKO, RAS, CAS,
DREAD, DWRT, FS384O, A0 to A8
TTL output
P3, P4, SIAK
CMOS intermediate current output
Circuit
Output data
ADL2, ADL3, ADM2, ADM3, ADR2,
ADR3
Analog output
DALP, DALN, DARP, DARN
Output data
Output data
SI, SICK, SIRQ, SRDY, (OSC1)
FS384I, BCKI, ASI, LRCKI
Schmitt input
Low Schmitt input
TEST1 to TEST5
Normal input
Input data
Input data
RES
SELC, SAIF, SAOF
Input with built-in pull-up resistor
Input with built-in pull-down resistor
Input data
Input data
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