WM8728SEDS-V Просмотр технического описания (PDF) - Wolfson Microelectronics plc

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WM8728SEDS-V

24-bit, 192kHz Stereo DAC with Volume Control

Wolfson Microelectronics plc 

WM8728

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The POR circuit requires that the DVDD is applied before the AVDD. The active low reset signal

NPOR will be asserted low until VMID rises to 1.2V. When this threshold has been reached, then

the NPOR is released and the digital interface has been reset. This is illustrated in the diagram

shown in Figure 5.

Figure 5 NPOR Generation At Power On Reset

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PD, Rev 4.6, August 2008

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