V826632G24SXTG-B0 Просмотр технического описания (PDF) - Mosel Vitelic Corporation
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V826632G24SXTG-B0 Datasheet PDF : 14 Pages
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MOSEL VITELIC
V826632G24S
AC Characteristics (cont.)
(PC333)
(PC266A) (PC266B) (PC200)
Parameter
Symbol Min Max Min Max Min Max Min Max Unit Note
Write DQS Preamble Hold Time
tWPREH 0.25
-
0.25
- 0.25 - 0.25 - CLK
Write DQS Postamble Time
tWPST
0.4
0.6
0.4
0.6 0.4 0.6 0.4 0.6 CLK
Mode Register Set Delay
tMRD
2
-
2
-
2
-
2
- CLK
Power Down Exit Time
tPDEX
10
-
10
-
10
-
10
- ns
Exit Self Refresh to Non-Read Command
tXSNR
75
-
75
-
75
-
80
- ns
Exit Self Refresh to Read Command
tXSRD
200
-
200
-
200
-
200
- CLK 8
Average Periodic Refresh Interval
tREFI
-
7.8
-
7.8
-
7.8
-
7.8 us
Notes: 1. This calculation accounts for tDQSQ(max), the pulse width distortion of on-chip circuit and jitter.
2. Data sampled at the rising edges of the clock : A0~A11, BA0~BA1, CKE, CS, RAS, CAS, WE.
3. For command/address input slew rate >=1.0V/ns
4. For command/address input slew rate >=0.5V/ns and <1.0V/ns
5. CK, CK slew rates are >=1.0V/ns
6. These parameters guarantee device timing, but they are not necessarily tested on each device, and they may be guaranteed
by design or tester correlation.
7. Data latched at both rising and falling edges of Data Strobes(DQS) : DQ, DM
8. Minimum of 200 cycles of stable input clocks after Self Refresh Exit command, where CKE is held high, is required to complete
Self Refresh Exit and lock the internal DLL circuit of DDR SDRAM.
Absolute Maximum Ratings
Parameter
Ambient Temperature
Storage Temperature
Voltage on Any Pin relative to VSS
Voltage on VDD relative to VSS
Voltage on VDDQ relative to VSS
Output Short Circuit Current
Power Dissipation
Soldering Temperature • Time
Symbol
TA
TSTG
VIN, VOUT
VDD
VDDQ
IOS
PD
TSOLDER
Note: Operation at above absolute maximum rating can adversely affect device reliability
Rating
0 ~ 70
-55 ~ 125
-0.5 ~ 3.6
-0.5 ~ 3.6
-0.5 ~ 3.6
50
7
260 • 10
Unit
°C
°C
V
V
V
mA
W
°C • Sec
V826632G24S Rev. 1.1 July 2002
11
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