UPA1793 Просмотр технического описания (PDF) - NEC => Renesas Technology

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Компоненты Описание

производитель

UPA1793

SWITCHING N- AND P-CHANNEL POWER MOS FET

NEC => Renesas Technology 

µPA1793

B) P-Channel

www.DataSheet4U.com

Characteristics

Zero Gate Voltage Drain Current

Gate Leakage Current

Gate Cut-off Voltage

Forward Transfer Admittance

Drain to Source On-state Resistance

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

Turn-on Delay Time

Rise Time

Turn-off Delay Time

Fall Time

Total Gate Charge

Gate to Source Charge

Gate to Drain Charge

Body Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Symbol

Test Conditions

IDSS

IGSS

VGS(off)

| yfs |

RDS(on)1

RDS(on)2

RDS(on)3

Ciss

Coss

Crss

td(on)

tr

td(off)

tf

QG

QGS

QGD

VF(S-D)

VDS = –20 V, VGS = 0 V

VGS = m 12 V, VDS = 0 V

VDS = –10 V, ID = –1 mA

VDS = –10 V, ID = –1.5 A

VGS = –4.5 V, ID = –1.5 A

VGS = –4.0 V, ID = –1.5 A

VGS = –2.5 V, ID = –1.0 A

VDS = –10 V

VGS = 0 V

f = 1 MHz

VDD = –10 V, ID = –1.5 A

VGS = –4.0 V

RG = 10 Ω

VDD = –10 V

VGS = –4.0 V

ID = –3.0 A

IF = 3.0 A, VGS = 0 V

trr

IF = 3 A, VGS = 0 V

Qrr

di/dt = 10 A/µs

MIN. TYP. MAX. Unit

–10 µA

m 10 µA

–0.5 –1.0 –1.5 V

1.0

S

75 115 mΩ

80 120 mΩ

116 190 mΩ

370

pF

110

pF

40

pF

120

ns

260

ns

410

ns

360

ns

3.4

nC

1.3

nC

1.6

nC

0.86

V

24

ns

1.5

nC

TEST CIRCUIT 1 SWITCHING TIME

TEST CIRCUIT 2 GATE CHARGE

D.U.T.

RG

PG.

VGS (−)

0

τ

τ = 1µs

Duty Cycle ≤ 1%

RL

VDD

VGS (−)

VGS

Wave Form

10%

0

VDS (−)

90%

VDS

VDS

0

Wave Form

td(on)

VGS

90%

90%

10% 10%

tr td(off)

tf

ton

toff

D.U.T.

IG = −2 mA

RL

PG.

50 Ω

VDD

4

DataSheet G16059EJ1V0DS

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