UPA1716G-E2 Просмотр технического описания (PDF) - NEC => Renesas Technology
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UPA1716G-E2 Datasheet PDF : 8 Pages
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µ PA1716
ELECTRICAL CHARACTERISTICS (TA = 25 °C, All terminals are connected.)
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
Drain to Source On-state Resistance
RDS(on)1 VGS = –10 V, ID = –4.0 A
RDS(on)2
RDS(on)3
VGS = –4.5 V, ID = –4.0 A
VGS = –4.0 V, ID = –4.0 A
Gate to Source Cut-off Voltage
VGS(off) VDS = –10 V, ID = –1 mA
–1.0
Forward Transfer Admittance
| yfs | VDS = –10 V, ID = –4.0 A
7
Drain Leakage Current
Gate to Source Leakage Current
IDSS
VDS = –30 V, VGS = 0 V
IGSS
# VGS = 20 V, VDS = 0 V
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Ciss
VDS = –10 V
Coss
VGS = 0 V
f = 1 MHz
Crss
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
td(on)
tr
td(off)
tf
ID = –4.0 A
VGS(on) = –10 V
VDD = –15 V
RG = 10 Ω
Total Gate Charge
Gate to Source Charge
Gate to Drain Charge
QG
ID = –8.0 A
QGS
VDD = –24 V
QGD
VGS = –10 V
Body Diode Forward Voltage
VF(S-D) IF = 8.0 A, VGS = 0 V
Reverse Recovery Time
Reverse Recovery Charge
trr
IF = 8.0 A, VGS = 0 V
Qrr
di/dt = 100 A/µ s
TYP.
12.5
17
19
–1.6
14
2100
700
300
30
150
120
76
40
6
10
0.8
45
33
MAX.
16
23
26
–2.5
–1
# 10
UNIT
mΩ
mΩ
mΩ
V
S
µA
µA
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
V
ns
nC
TEST CIRCUIT 1 SWITCHING TIME
D.U.T.
RG
PG.
RG = 10 Ω
VGS
0
τ
τ = 1µ s
Duty Cycle ≤ 1 %
RL
VDD
VGS
Wave Form
VGS
0 10 %
ID
ID
Wave Form
0 10 %
VGS (on) 90 %
90 %
ID
90 %
10 %
td (on)
tr
td (off)
tf
ton
toff
TEST CIRCUIT 2 GATE CHARGE
D.U.T.
IG = 2 mA
RL
PG.
50 Ω
VDD
2
Data Sheet G13727EJ1V0DS00
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