Philips Semiconductors
I2C-bus controlled multistandard alignment-free
IF-PLL demodulator with FM radio
Product specification
TDA9887
9.2.4 DATA BYTE FOR DATA MODE
Table 14 Bit description of SAD register for data mode (SAD = 10)
BIT
E7
E6
E5
E4 to E2
E1 and E0
VALUE
1
0
00
01
10
11
DESCRIPTION
AGC features
dependent on bit E5; see Tables 15 and 16
L standard PLL gating
gating in case of 36 % positive modulation
gating in case of 0 % positive modulation
VIF, SIF and tuner minimum gain
dependent on bit E7; see Table 15
Frequency selection
see Table 17
Standard frequency sound intercarrier (sound 2nd IF)
fFM = 4.5 MHz
fFM = 5.5 MHz
fFM = 6.0 MHz
fFM = 6.5 MHz (for positive modulation choose 6.5 MHz)
Table 15 Options in extended TV mode; bit B3 = 0 of SAD = 00 register
FUNCTION
Pin OP1
Pin OP2
Gain
BIT E7 = 0
BIT E5 = 0
BIT E5 = 1
port function
port function
normal gain
port function
port function
minimum gain
BIT E7 = 1
BIT E5 = 0
port function
VIF-AGC output(1)
normal gain
BIT E5 = 1
VIF-AGC external input(1)
port function
external gain
Note
1. The corresponding port function has to be disabled (set to ‘high-impedance’); see Table 11 and Chapter 12,
characteristics table, note 12.
Table 16 Options in extended radio mode; bit B3 = 1 of SAD = 00 register
FUNCTION
BIT E7 = 0
Pin AFC
FM radio carrier related AFC
BIT E7 = 1
BIT E3 = 0
BIT E3 = 1
SIF-AGC radio output FM-AGC radio output
2004 Aug 25
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