tm TE
CH
T4312816B
CLK
CKE
CS#
RAS#
CAS#
WE #
A11
A10
A0-A9
DQM
DQ Hi-Z
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
tCK2
Clock min.
Address Key
tRP
PrechargeAll Mode Register Any
Set Command Command
Mode Register Set Cycle (CAS# Latency = 2, 3)
The mode register is divided into various fields depending on functionality.
Address BS0,1 A11,10 A9 A8 A7 A6 A5 A4 A3
Function RFU* RFU* WBL Test Mode
CAS Latency
BT
*Note: RFU (Reserved for future use) should stay “0” during MRS cycle.
A2 A1 A0
Burst Length
TM Technology Inc. reserves the right
P. 10
to change products or specifications without notice.
Publication Date: FEB. 2007
Revision: A