HSP45256 Просмотр технического описания (PDF) - Intersil

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производитель

HSP45256

Binary Correlator

Intersil 

HSP45256

Block Diagram (Continued)

OFFSET

REGISTER A

OFFAM

OFFAL

OFFBM

OFFBL

DELAY

R

(010)

E

>G

R

(011) E

>G

R

(101) E

>G

R

(110)

E

>G

5

8

R

E

1

G

>

8

OFFSET

REGISTER B

CONFIG(4:0)

CORRELATION

SCORE OUT

CO7

CO6

WEIGHT

R

E

>G

SUM

4

DELAY

R

PROGRAMMABLE

E

DELAY

>G

(100)

CASOUT(12:0)

+

R

E

>G

OEC

CO0

REFERENCE OUT

CASIN(12:0)

OEA

OEC

DOUT(7:0)

CASCADE

REGISTER R

E

>G

NOTE: All registers clocked with CLK unless otherwise specified.

6

R

E

>G

RO(0-7)

R

E

>G

RLOAD

CONFIG(4:0)

AUXOUT(8:0)

OEA

DOUT(7:0)

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