SC5010 Просмотр технического описания (PDF) - Semtech Corporation
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SC5010
Semtech Corporation
SC5010 Datasheet PDF : 36 Pages
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SC5010
Absolute Maximum Ratings
Recommended Operating Conditions
VCC Pin (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.0
VIN, DRVP, IO1 to IO8(V) . . . . . . . . . . . . . . . . . . . . -0.3 to +30
DRVN, OVP, CS, EN, UVLO, SCP, BG, FLT (V) . . . -0.3 to +6.0
FSET, CPLL, SYNC, SCL, SDA, ISET, PWMI (V). . -0.3 to +6.0
PGND TO AGND (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3
ESD Protection Level(1) (kV) . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5
Ambient Temperature Range (°C). . . . . . . . -40 < T < +85
A
VIN (V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 to 27
IO1 to IO8 Current per String (mA) . . . . . . . . . . . up to 30
Thermal Information
Thermal Resistance, Junction to Ambient(2) (°C/W) . . . . 30
Maximum Junction Temperature (°C) . . . . . . . . . . . . . . +150
Storage Temperature Range (°C). . . . . . . . . . . . -65 to +150
Peak IR Reflow Temperature (10s to 30s) (°C) . . . . . . +260
Exceeding the above specifications may result in permanent damage to the device or device malfunction. Operation outside of the parameters
specified in the Electrical Characteristics section is not recommended.
NOTES:
(1) Tested according to JEDEC standard JESD22-A114-B.
(2) Calculated from package in still air, mounted to 3 x 4.5 (in.), 4 layer FR4 PCB with thermal vias under the exposed pad per JESD51 standards.
Electrical Characteristics
Unless noted otherwise, T = 25°C for typical, -40°C < T = T < 85°C for min and max. V = 5V, R = 64.9 kΩ, R = 100 kΩ , V = 12V.
A
AJ
CC
ISET
FSET
IN
Parameter
Symbol
Conditions
Min Typ Max
Units
Input Supply
V Supply Voltage
CC
V Under-Voltage Lockout Threshold
CC
VCC Under-Voltage Lockout Hysteresis
VCC Quiescent Supply Current
V Supply Current in Shutdown
CC
V Supply Current in Shutdown
IN
V Under-Voltage Lockout Threshold
UVLO
I Under-Voltage Lockout Hysteresis
UVLO
V Bandgap Voltage
BG
External FET Gate Drive
V
CC
V
CC-UVLO(TH)
VCC-UVLO(HYS)
ICC(Q)
I
CC(SD)
I
VIN(SD)
V
UVLO(TH)
I
UVLO(HYS)
V
BG
V Voltage Rising
CC
VCC Voltage Falling
EN = 5V, Switching, No Load
EN = 0V
EN = 0V, VIN = 27V
UVLO Pin Voltage Rising
UVLO Pin Voltage Falling
4.5
5.5
V
4.0 4.2
4.4
V
180
mV
2
mA
1
μA
1
μA
1.18 1.23 1.28
V
7
10
13
μA
1.20 1.23 1.26
V
DRVN High Level
DRVN Low Level
DRVN On-Resistance
DRVN Sink / Source Current
V
DRVN(H)
V
DRVN(L)
R
DRVN
I
DRVN
100mA from DRVN to GND
-100mA from DRVN to V
CC
DRVN high or Low
DRVN forced to 2.5V
V -0.5 V -0.2
CC
CC
0.2
0.5
2
5
1
V
V
A
3
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