C504
AC Characteristics of Programming Mode
(VDD = 5 V ± 10%; VPP = 11.5 V ± 5 %; TA = 25 °C ± 10 °C)
Parameter
Symbol Limit Values
min.
max.
PALE pulse width
tPAW
35
–
PMSEL setup to PALE rising edge
tPMS
10
–
Address setup to PALE, PROG, or PRD tPAS
10
–
falling edge
Address hold after PALE, PROG, or PRD tPAH
10
–
falling edge
Address, data setup to PROG or PRD tPCS
100
–
Address, data hold after PROG or PRD tPCH
0
–
PMSEL setup to PROG or PRD
tPMS
10
–
PMSEL hold after PROG or PRD
tPMH
10
–
PROG pulse width
tPWW
100
–
PRD pulse width
tPRW
100
–
Address to valid data out
tPAD
–
75
PRD to valid data out
tPRD
–
20
Data hold after PRD
tPDH
0
–
Data float after PRD
tPDF
–
20
PROG high between two consecutive tPWH1
1
–
PROG low pulses
PRD high between two consecutive PRD tPWH2
100
–
low pulses
XTAL clock period
tCLKP
83.3
285.7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
µs
ns
ns
Note:
VPP = 11.5 V ± 5% is valid for devices with version byte 2 = 02H or higher. Devices with version byte 2 = 01H must
be programmed with VPP = 12 V ± 5%.
Data Sheet
59
2000-05