S5L9284D
DIGITAL SIGNAL PROCESSOR
DIGITAL PLL BLOCK
This device contains analog PLL and digital PLL together, in order to obtain the stable channel clock for
demodulating the EFM signal.
The block diagram of digital PLL is as follows.
X - Tal
Voltage
Controlled
Low
Pass
Filter
Voltage
Controlled
Oscillator
I/N
Divider
Digital
PLL
Figure 20. The Application Diagram of Digital PLL
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