DIGITAL SIGNAL PROCESSOR
S5L9284D
PBFR :
SMSD :
PBFR :
SMSD :
287T
288T
(a) Timing Chart of SMSD Output When PBFR is “287T”
294T
512T
(b) Timing Chart of SMSD Output When PBFR is “294T”
Figure 18. Timing Chart of SMSD Output at Phase Mode.
PHC:
BHC:
EFM Width ( > 22T):
EFM Width ( > 23T):
PH F/F ( > 22T):
PH F/F ( > 23T):
1 22T
2 21T >
1
TB
> 23noise
TP
3
1
1
BH F/F (>22T) :
BH F/F (> 23T) :
11
01
01
Latch ( 22T ) :
Latch ( 23T ) :
SMPD:
0
1
Z : 225T ( output for 1 )
1
1
L : > 21T ( output for 2 )
0
0
10
10
0
0
H : (output for 3 )
Figure 19. Timing Chart of SMPD Output When the Gain is “H” in the Speed Mode
23