SPT7722AIQ Просмотр технического описания (PDF) - Signal Processing Technologies
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SPT7722AIQ Datasheet PDF : 12 Pages
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ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C
Supply Voltages
Negative Supply Voltage (VEE TO GND) –7.0 to +0.5 V
Ground Voltage Differential .................... –0.5 to +0.5 V
Input Voltage
Analog Input Voltage ............................... VEE to +0.5 V
Reference Input Voltage .......................... VEE to +0.5 V
Digital Input Voltage ................................ VEE to +0.5 V
Reference Current VRTF to VRBF ........................ 25 mA
Output
Digital Output Current ............................... 0 to –30 mA
Temperature
Operating Temperature,ambient ............. –25 to +85 °C
junction ...................... +150 °C
Lead Temperature, (soldering 10 seconds) ..... +300 °C
Storage Temperature ............................ –65 to +150 °C
Note: 1. Operation at any Absolute Maximum Rating is not implied. See
Electrical Specifications for proper nominal applied conditions
in typical applications.
ELECTRICAL SPECIFICATIONS
TA= TMIN to TMAX, VEE=–5.2 V, RSource=50 Ω, VRBF=–2.00 V, VR2=–1.00 V, VRTF=0.00 V, ƒCLK=250 MHz, Duty Cycle=50%, unless otherwise specified.
PARAMETERS
TEST
TEST
SPT7725A
CONDITIONS LEVEL MIN TYP MAX
SPT7725B
MIN TYP MAX UNITS
DC Accuracy
Integral Linearity Error
Differential Linearity Error
No missing codes
ƒCLK = 100 kHz VI
ƒCLK = 100 kHz VI
–0.75 ±0.60 +0.75
–0.75
+0.75
Guaranteed
–0.95 ±0.80 +0.95 LSB
–0.95
+0.95 LSB
Guaranteed
Analog Input
Offset Error VRT
Offset Error VRB
Input Voltage Range
Input Capacitance
Input Resistance
Input Current
Input Slew Rate
Large Signal Bandwidth
Small Signal Bandwidth
Clock Synchronous
Input Currents
VI
VI
VI
Over full
input range
V
V
VI
V
VIN=F.S.
V
VIN=500 mVP-P V
V
–30
+30
–30
+30
–2.0
0.0
10
15
250 500
1,000
210
335
40
–30
–30
–2.0
10
15
250
1,000
210
335
40
+30 mV
+30 mV
0.0 Volts
pF
kΩ
500 µA
V/µs
MHz
MHz
µA
Reference Input
Ladder Resistance
Reference Bandwidth
VI
100 200 300
100 200 300 Ω
V
10
10
MHz
Timing Characteristics
Maximum Sample Rate
Clock to Data Delay
Output Delay Tempco
CLK-to-Data Ready Delay (tD)
Aperture Jitter
Acquisition Time
IV
250 300
V
2.4
V
2
V
2.0
V
5
V
1.5
250 300
2.4
2
2.0
5
1.5
MSPS
ns
ps/°C
ns
ps
ns
Dynamic Performance
Signal-to-Noise Ratio
ƒIN = 3.58 MHz VI
ƒIN = 50 MHz
VI
Total Harmonic Distortion
ƒIN = 3.58 MHz VI
ƒIN = 50 MHz
VI
Signal-to-Noise and Distortion ƒIN = 3.58 MHz VI
(SINAD)
ƒIN = 50 MHz
VI
45
47
39
42
–52 –48
–43 –40
44
46
37
39
44
46
dB
38
41
dB
–50 –46 dB
–42 –39 dB
42
44
dB
35
37
dB
SPT
2
SPT7725
8/17/01
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