Philips Semiconductors
Hot swappable I2C and SMBus bus buffer
Product data sheet
PCA9510; PCA9511
PIN CONFIGURATION
ENABLE 1
SCLOUT 2
SCLIN 3
GND 4
TOP VIEW
8 VCC
7 SDAOUT
6 SDAIN
5 READY
SW01045
Figure 1. Pin configuration.
PIN DESCRIPTION
PIN SYMBOL DESCRIPTION
1
ENABLE Chip enable pin. Grounding this pin puts the
part in a low current (<1 µA) mode. It also
disables the rise time accelerators, isolates
SDAIN from SDAOUT and isolates SCLIN
from SCLOUT.
2
SCLOUT Serial clock output to and from the SCL bus
on the card.
3
SCLIN
Serial clock input to and from the SCL bus
on the backplane.
4
GND
Ground. Connect this pin to a ground plane
for best results.
5
READY This is an open-drain output which pulls
LOW when SDAIN and SCLIN are
disconnected from SDAOUT and SCLOUT,
and turns off when the two sides are
connected.
6
SDAIN Serial data input to and from the SDA bus on
the backplane.
7
SDAOUT Serial data output to and from the SDA bus
on the card.
8
VCC
Power supply.
FEATURE SELECTION CHART
FEATURES
Idle detect
High impedance SDA, SCL pins for VCC = 0 V
Rise time accelerator circuitry on all SDA and SCL lines
Rise time accelerator circuitry hardware disable pin for lightly loaded
systems
Rise time accelerator threshold 0.8 V vs 0.6 V improves noise margin
Ready open drain output
Two VCC pins to support 5 V to 3.3 V level translation with improved noise
margins
1 V precharge on all SDA and SCL lines
92 µA current source on SCLIN and SDAIN for PICMG applications
PCA9510
Yes
Yes
—
PCA9511
Yes
Yes
Yes
PCA9512
Yes
Yes
Yes
PCA9513
Yes
Yes
Yes
PCA9514
Yes
Yes
Yes
—
—
Yes
—
—
—
—
—
Yes
Yes
Yes
Yes
—
Yes
Yes
—
—
Yes
—
—
IN only
Yes
Yes
—
—
—
—
—
Yes
—
2004 Oct 05
3