Philips Semiconductors
Hot swappable I2C and SMBus bus buffer
Product data sheet
PCA9510; PCA9511
SCLIN/SDAIN
SCLOUT/SDAOUT
ENABLE
READY
tEN
tIDLE
tREADY
Figure 18. tREADY delay that can occur after tENALBE and tIDLE
VCC
PULSE
GENERATOR
VI
RT
VO
D.U.T.
VCC
RL = 10 kΩ
CL= 100 pF
DEFINITIONS
RL = Load resistor.
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to the output
impedance ZO of the pulse generators.
SW02345
Figure 19. Test circuitry for switching times
SW02157
2004 Oct 05
15