GLT6400L16 Просмотр технического описания (PDF) - G-Link Technology

Номер в каталоге

Компоненты Описание

производитель

GLT6400L16

Ultra Low Power 256k x 16 CMOS SRAM

G-Link Technology  

G-LINK

GLT6400L16

Ultra Low Power 256k x 16 CMOS SRAM

May 2003(Rev. 1.4)

Features :

Description :

∗ Low-power consumption.

The GLT6400L16 is a low power CMOS Static

-active: 45mA Icc at 85ns.

RAM organized as 262,144 words by 16 bits. Easy

-stand by :

memory expansion is provided by an active LOW

20 µA (CMOS input / output , LL)

CE1 and OE pin and active HIGH CE2.

5 µA (CMOS input / output, SL)

∗ Single +2.7V to 3.6V power supply.

∗ Equal access and cycle time.

∗ 70ns/85ns access time

∗ Tri-state output.

This device has an automatic power – down

mode feature when deselected. Separate Byte

Enable controls ( BLE and BHE ) allow individual

bytes to be accessed. BLE controls the lower bits

∗ Automatic power-down when

I/O0 – I/O7. BHE controls the upper bits I/O8 –

deselected.

I/O15.

∗ Multiple center power and ground pins

Writing to these devices is performed by taking

for improved noise immunity.

∗ Individual byte controls for both read

and write cycles.

Chip Enable CE1 with Write Enable WE and byte

Enable ( BLE / BHE ) Low while CE2 remains

∗ Industrial grade (-40°C ~ 85°C)

available.

HIGH.

Reading from the device is performed by taking

∗ Available in 48-fpBGA/44L TSOPII.

Chip Enable CE1 with Output enable OE and byte

∗ CE2 pin available for fpBGA only.

Enable ( BLE / BHE ) Low while Write Enable WE

and CE2 are held HIGH.

Function Block Diagram :

INPUT BUFFER

I/O7

Cell

Array

I/O1

COLUMN DECODER

Column Address

CONTROL

CIRCUIT

OE

WE

CE1

CE2

G-Link Technology Corporation,Taiwan

Web : www.glink.com.tw Email : sales@glink.com.tw

TEL : 886-2-26599658

-1-

Share Link: