NCP1611 Просмотр технического описания (PDF) - ON Semiconductor

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NCP1611

Enhanced, High-Efficiency Power Factor Controller

ON Semiconductor 

NCP1611

In some cases, the system enters then the dead−time (t3) that

lasts until the next clock is generated.

One can show that the ac line current is given by:

ƪ ƫ t1ǒt1 ) t2Ǔ

Iin + Vin

2TL

(eq. 1)

Where T = (t1 + t2 + t3) is the switching period and Vin is

the ac line rectified voltage.

In light of this equation, we immediately note that Iin is

proportional to Vin if [t1 (t1 + t2) / T] is a constant.

Figure 64. PFC Boost Converter (left) and Inductor Current in DCM (right)

The NCP1611 operates in voltage mode. As portrayed by

Figure 8, the MOSFET on−time t1 is controlled by the signal

Vton generated by the regulation block and an internal ramp

as follows:

Cramp @ Vton

t1 +

Ich

(eq. 2)

The charge current is constant at a given input voltage (as

mentioned, it is 3 times higher at high line compared to its

value at low line). Cramp is an internal capacitor.

The output of the regulation block (VCONTROL) is linearly

transformed into a signal (VREGUL) varying between 0 and

1 V. (VREGUL) is the voltage that is injected into the PWM

section to modulate the MOSFET duty−cycle. The

NCP1611 includes some circuitry that processes (VREGUL)

to form the signal (Vton) that is used in the PWM section (see

Figure 9). (Vton) is modulated in response to the dead−time

sensed during the precedent current cycles, that is, for a

proper shaping of the ac line current. This modulation leads

to:

Vton

+

T

@ VREGUL

t1 ) t2

(eq. 3)

or

Vton

@

t1

)

T

t2

+

VREGUL

Given the low regulation bandwidth of the PFC systems,

(VCONTROL) and then (VREGUL) are slow varying signals.

Hence, the (Vton • (t1 + t2) / T) term is substantially constant.

Provided that in addition, (t1) is proportional to (Vton),

Equation 1 leads to: (Iin = k • Vin), where k is a constant.

More exactly:

ƪ ƫ Iin + k @ Vin

where : k + constant +

ǒ Ǔ 1 @

2L

VREGUL @ ton,max

VREGUL max

Where ton,max is the maximum on−time obtained when

VREGUL is at its (VREGUL)max maximum level. The

parametric table shows that ton,max is equal to 25 ms

(TON(LL)) at low line and to 8.3 ms (TON(HL)) at high line

(when pin2 happens to exceed 2.2 V with a pace higher than

40 Hz – see BO 25 ms blanking time).

The input current is then proportional to the input voltage.

Hence, the ac line current is properly shaped.

One can note that this analysis is also valid in the CrM

case. This condition is just a particular case of this

functioning where (t3=0), which leads to (t1+t2=T) and

(VTON=VREGUL). That is why the NCP1611 automatically

adapts to the conditions and transitions from DCM and CrM

(and vice versa) without power factor degradation and

without discontinuity in the power delivery.

Hence, we can re−write the above equation as follows:

Iin

+

Vin

@ TON(LL)

2@L

@

VREGUL

ǒVREGULǓ max

at low line.

Iin

+

Vin

@ TON(HL)

2@L

@

VREGUL

ǒVREGULǓ max

at high line.

From these equations, we can deduce the expression of the

average input power:

ǒ Ǔ2

Vin,rms @ VREGUL @ TON(LL)

Pin,avg +

2 @ L @ ǒVREGULǓmax

at low line

ǒ Ǔ2

Vin,rms @ VREGUL @ TON(HL)

Pin,avg +

2 @ L @ ǒVREGULǓmax

at high line

Where (VREGUL)max is the 1 V VREGUL maximum value.

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