MSM518205-70SJ Просмотр технического описания (PDF) - Oki Electric Industry
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производитель
MSM518205-70SJ
Oki Electric Industry
MSM518205-70SJ Datasheet PDF : 18 Pages
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¡ Semiconductor
MSM518205
BLOCK DIAGRAM
RAS
CAS1
CAS2
Timing
Generator
Timing
Generator
Column
10 Address
Buffers
A0 - A9
Internal
Address
Counter
Column
10 Decoders
Write
Clock
Generator
WE
OE
Refresh
Control Clock
2 Output 2
Buffers
Sense
Amplifiers
2
I/O
Selector
2
2 DQ1, DQ2
2 Input 2
Buffers
10 Row
Row
Address 12 De-
A10R, A11R 2 Buffers coders
Word
Drivers
Memory
Cells
VCC
On Chip
VBB Generator
VSS
FUNCTION TABLE
Input Pin
RAS CAS1 CAS2 WE
OE
H
*
*
*
*
L
H
H
*
*
L
L
H
H
L
L
H
L
H
L
L
L
L
H
L
L
L
H
L
H
L
H
L
L
H
L
L
L
L
H
L
L
L
H
H
*: "H" or "L"
DQ Pin
DQ1
DQ2
High-Z
High-Z
High-Z
High-Z
DOUT
High-Z
High-Z
DOUT
DIN
Don't Care
DIN
High-Z
DOUT
DOUT
Don't Care
DIN
DIN
High-Z
Function Mode
Standby
Refresh
DQ1 Read
DQ2 Read
DQ1, DQ2 Read
DQ1 Write
DQ2 Write
DQ1, DQ2 Write
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