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MPC9446 Просмотр технического описания (PDF) - Freescale Semiconductor

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MPC9446 Datasheet PDF : 12 Pages
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Pulse
Generator
Z = 50
ZO = 50
MPC9446 DUT
RT = 50
VTT
ZO = 50
RT = 50
VTT
Figure 6. CCLK0, 1 MPC9446 AC Test Reference for VCC = 3.3 V and VCC = 2.5 V
VCC = 3.3V VCC = 2.5V
2.4
1.8V
CCLK
VCC
VCC÷2
GND
0.55
0.6V
Qx
tF
tR
VCC
VCC÷2
GND
t(LH)
t(HL)
Figure 7. Output Transition Time Test Reference
Figure 8. Propagation Delay (tPD) Test Reference
tSK(LH)
VCC
VCC÷2
GND
VCC
VCC÷2
GND
tSK(HL)
The pin-to-pin skew is defined as the worst case difference
in propagation delay between any two similar delay paths
within a single device.
Figure 9. Output-to-Output Skew tSK(LH, HL)
CCLK
QX
t(LH)
t(HL)
VCC
VCC÷2
GND
VCC
VCC÷2
GND
tSK(P) = | tPLH – tPHL |
Figure 10. Output Pulse Skew (tSK(P)) Test Reference
VCC
VCC÷2
GND
tP
T0
DC = tP/T0 x 100%
The time from the PLL controlled edge to the non controlled
edge, divided by the time between PLL controlled edges,
expressed as a percentage.
Figure 11. Output Duty Cycle (DC)
TN
TN+1
TJIT(CC) = |TN-TN+1|
The variation in cycle time of a signal between adjacent
cycles, over a random sample of adjacent cycle pairs.
Figure 12. Cycle-to-Cycle Jitter
Advanced Clock Drivers Devices
Freescale Semiconductor
MPC9446
7

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