MC10E142, MC100E142
SEL D8 D7 D6 D5 VCCO Q8
25 24 23 22 21 20 19
MR 26
18 Q7
CLK1 27
17 Q6
CLK2 28
16 VC
VEE
1
S-IN 2
MC10E142/MC100E142
15 Q5
14 VC
D0 3
D1 4
13 Q4
12 Q3
5 6 7 8 9 10 11
S-IN
D0
1
0
DQ
Q0
D1
1
0
Q
D
Q1
D2
1
0
Q
D
Q2
D3
1
0
DQ
Q3
D2 D3 D4 VCCO Q0 Q1 Q2
* All VCC and VCCO pins are tied together on the die.
Warning: All VCC, VfCCO, and VEE pins must be externally
connected to Power Supply to guarantee proper operation.
Figure 1. Pinout: PLCC−28 (Top View)
1
DQ
Q8
D8
0
SEL
CLK1
CLK2
MR
Table 1. PIN DESCRIPTION
Pin
Function
D0 − D8
S-IN
ECL Parallel Data Inputs
ECL Serial Data Input
SEL
ECL Mode Select Input
CLK1, CLK2
ECL Clock Inputs
MR
ECL Master Reset
Q0 − Q8
ECL Data Outputs
VCC, VCCO
Positive Supply*
VEE
Negative Supply
*From VCC pin to each VCCO pin is an internal 100 W resistor.
Figure 2. Logic Diagram
Table 2. FUNCTIONS
SEL
L
Load
H
Shift
Mode
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2