MB88346B
■ DATA FOR CHIP CONTROL
1. Data for Shift Register
• The chip is controlled by 12 bits of data input to the shift register.
• The shift register inputs a total of 12 bits of data consisting of a four-bit address selection signal and an eight-
bit D/A converter control signal.
• A data to the shift register is inputted to the DI pin in the order of D11 (MSB) to D0 (LSB) .
Last (LSB)
First (MSB)
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D/A converter control signal
Address selected signal
2. D/A Converter Control Signal
Input data signal
D0
D1
D2
D3
D4
D5
D6
D7
D/A converter output voltage
0
0
0
0
0
0
0
0
≅ VSS
1
0
0
0
0
0
0
0 ≅ VREF / 255 × 1 + VSS
0
1
0
0
0
0
0
0 ≅ VREF / 255 × 2 + VSS
1
1
0
0
0
0
0
0 ≅ VREF / 255 × 3 + VSS
0
1
1
1
1
1
1
1 ≅ VREF / 255 × 254 + VSS
1
1
1
1
1
1
1
1
≅ VDD
VREF = VDD - VSS
5