LTC2925IUF(RevD) Просмотр технического описания (PDF) - Linear Technology

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LTC2925IUF
(Rev.:RevD)

Multiple Power Supply Tracking Controller with Power Good Timeout

Linear Technology 

LTC2925

Applications Information

Tracking Cell

The LTC2925’s operation is based on the tracking cell

shown in Figure 5, which uses a proprietary wide-range

current mirror. The tracking cell shown in Figure 5 servos

the TRACK pin at 0.8V. The current supplied by the TRACK

pin is mirrored at the FB pin to establish a voltage at the

output of the slave supply. The slave output voltage varies

with the master signal, enabling the slave supply to be

controlled as a function of the master signal with terms

set by RTA and RTB. By selecting appropriate values of

RTA and RTB, it is possible to generate any of the profiles

in Figures 1 to 4.

VCC

MASTER

RTB

TRACK

RTA

+– 0.8V

FB

DC/DC

FB OUT

RFA RFB

2925 F05

Figure 5. Simplified Tracking Cell

SLAVE

Controlling the Ramp-Up and Ramp-Down Behavior

The operation of the LTC2925 is most easily understood by

referring to the simplified functional diagram in Figure 6.

When the ON pin is low, the GATE pin is pulled to ground

causing the master signal to remain low. Since the current

through RTB1 is at its maximum when the master signal

is low, the current from FB1 is also at its maximum. This

current drives the slave’s output to its minimum voltage.

When the ON pin rises above 1.23V, the master signal rises

and the slave supply tracks the master signal. The ramp

rate is set by an external capacitor driven by a 10µA current

source from an internal charge pump. If no external FET

is used, the ramp rate is set by tying the RAMP and GATE

pins together at one terminal of the external capacitor (see

the Ratiometric Tracking Example).

In a properly designed system, when the master signal

has reached its maximum voltage the current from the

TRACK1 pin is zero. In this case, there is no current from

the FB1 pin and the LTC2925 has no effect on the output

voltage accuracy, transient response or stability of the

slave supply.

When the ON pin falls below VON(TH) – ∆VON(HYST), typi-

cally 1.225V, the GATE pin pulls down with 10µA and the

master signal and the slave supplies will fall at the same

rate as they rose previously.

The ON pin can be controlled by a digital I/O pin or it

can be used to monitor an input supply. By connecting a

resistive divider from an input supply to the ON pin, the

supplies will ramp up only after the monitored supply has

reached a preset voltage.

VCC

SCTMR

50µA

2µA

SENSEP – SENSEN > 50mV

SENSEP

50mV

SENSEN

+

1.2V –

RONB

ON

+

RONA

1.2V

–

RAMPBUF

1×

10µA

10µA

VCC

GATE

RAMP

Q1

CGATE

MASTER

0.8V

RTB1

RTA1

TRACK1

FB1

DC/DC

SLAVE1

RFA1 RFB1

2925 F06

Figure 6. Simplified Functional Block Diagram

10

For more information www.linear.com/LTC2925

2925fd

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