1418IG Просмотр технического описания (PDF) - Linear Technology

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1418IG

Low Power, 14-Bit, 200ksps ADC with Serial and Parallel I/O

Linear Technology 

LTC1418

APPLICATIONS INFORMATION

clock appears on CLKOUT (Pin 18) which can be tied to

SCLK (Pin 17) to supply the SCLK.

Using External Clock for Conversion and Data Transfer

In Figure 23, data from the previous conversion is output

during the conversion with an external clock providing

both the conversion clock and the shift clock. To select

an external conversion clock, tie EXT/INT high and apply

the clock to EXTCLKIN. The same clock is also applied to

SCLK to provide a data shift clock. To maintain accuracy

the conversion clock frequency must be between 30kHz

and 4.5MHz.

It is not recommended to clock data with an external clock

during a conversion that is running on an internal clock

because the asynchronous clocks may create noise.

Serial Data Output After a Conversion

Using Internal Conversion Clock and External Data Clock.

In this mode, data is output after the end of each conver-

sion but before the next conversion is started (Figure 24).

The internal clock is used as the conversion clock and an

external clock is used for the SCLK. This mode is useful in

applications where the processor acts as a master serial

device. This mode is SPI and MICROWIRE compatible. It

also allows operation when the SCLK frequency is very low

(SAMPLE N)

CS = 0, EXT/INT = 5

t5

CONVST

t6

CONVST 24

CONVST BUSY

RD

EXTCLKIN

26

BUSY (= RD)

23

16 EXTCLKIN ( = SCLK)

LTC1418

SCLK

DOUT

EXT/INT

17

19

20 5V

DOUT

CS

25

μP OR DSP

1418 F23a

t13

(SAMPLE N + 1)

t8

BUSY (= RD)

HOLD

SAMPLE

HOLD

tdEXTCLKIN

1

2

3

4

5

6

7

8

9 10 11 12 13 14 15 16

EXTCLKIN (= SCLK)

1

2

3

DOUT

t10

Hi-Z D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

DATA (N – 1)

tCONV

FILL

ZEROS

t7

Hi-Z

D13

D13 D12 D11

DATA N

t11

1418 F23b

EXTCLKIN

(= SCLK)

DOUT

tLEXTCLKIN

VIL

t14

t15

D13

tHEXTCLKIN

D12

VOH

D11

VOL

CAPTURE ON CAPTURE ON

RISING CLOCK FALLING CLOCK

Figure 23. External Conversion Clock Selected. Data Transferred During Conversion Using the External Clock (External Clock

Drives Both EXTCLKIN and SCLK)

1418fa

24

For more information www.linear.com/LTC1418

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