ISPLSI2128V-80LJ84I Просмотр технического описания (PDF) - Lattice Semiconductor

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производитель

ISPLSI2128V-80LJ84I

3.3V High Density Programmable Logic

Lattice Semiconductor 

Pin Configuration

ispLSI 2128V 100-Pin TQFP Pinout Diagram

Specifications ispLSI 2128V

I/O 57

1

I/O 58

2

I/O 59

3

1NC

4

I/O 60

5

I/O 61

6

I/O 62

7

I/O 63

8

NS 75

NC1

IG 74

I/O 38

73

I/O 37

72

I/O 36

S 71

NC1

E70

I/O 35

69

I/O 34

D68

I/O 33

IN 7

9

Y0

10

RESET

11

VCC

12

GOE 1

13

GND

14

67

66

W ispLSI 2128V

65

64

E Top View

63

N 62

ispEN

15

TDI/IN 0

16

R I/O 0

17

I/O 1

18

O I/O 2

19

F I/O 3

20

1NC

21

E I/O 4

22

I/O 5

23

V I/O 6

24

8 1NC

25

USE ispLSI 212 1. NC pins are not to be connected to any active signals, VCC or GND.

61

60

59

58

57

56

55

54

53

52

51

I/O 32

IN 4

Y1

NC1

VCC

GOE 0

GND

Y2

TCK/IN 3

I/O 31

I/O 30

I/O 29

I/O 28

NC1

I/O 27

I/O 26

I/O 25

100-TQFP/2128V

13

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