ISL97649B Просмотр технического описания (PDF) - Intersil

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ISL97649B

TFT-LCD Supply + DCP + VCOM Amplifier + Gate Pulse Modulator + RESET

Intersil 

ISL97649B

Start-up Sequence

When VIN rising exceeds UVLO, it takes 120µs to read the

settings stored in the chip in order to activate the chip correctly.

When VIN is above UVLO and EN is high, the boost converter

starts up. The gate pulse modulator output VGHM is held low

until VDPM is charged to 1.215V. The detailed power-on

sequence is shown in Figure 19.

EN

UVLO

VIN

AVDD

VOFF

PANEL NORMAL OPERATION

TSS_AVDD CONTROLLED BY VSS

UVLO

VON

VCOM

1.280V

VDIV

1.217V

CD2

1.222V

RESET

1.215V

VDPM

VGHM

GPM ENABLED WHEN BOTH

1) EN = HIGH AND

2) VDPM >1.215V

VGHM OUTPUT TIED TO VGH WHEN VIN FALLS TO UVLO

FIGURE 19. ISL97649B DETAILED POWER-ON/POWER-OFF SEQUENCE

16

FN7927.0

December 5, 2011

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