IDT82V2088(2008) Просмотр технического описания (PDF) - Integrated Device Technology

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IDT82V2088
(Rev.:2008)

OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT

Integrated Device Technology 

OCTAL CHANNEL T1/E1/J1 LONG HAUL/SHORT HAUL LINE INTERFACE UNIT

INDUSTRIAL

TEMPERATURE RANGES

3.5 LOS AND AIS DETECTION

3.5.1 LOS DETECTION

The Loss of Signal Detector monitors the amplitude of the incoming sig-

nal level and pulse density of the received signal on RTIPn and RRINGn.

• LOS declare (LOS=1)

A LOS is detected when the incoming signal has “no transitions”, i.e.,

when the signal level is less than Q dB below nominal for N consecutive

pulse intervals. Here N is defined by LAC bit (MAINT0, 0AH...). LOS will be

declared by pulling LOSn pin to high (LOS=1) and LOS interrupt will be gen-

erated if it is not masked.

• LOS clear (LOS=0)

The LOS is cleared when the incoming signal has “transitions”, i.e.,

when the signal level is greater than P dB below nominal and has an aver-

age pulse density of at least 12.5% for M consecutive pulse intervals, start-

ing with the receipt of a pulse. Here M is defined by LAC bit (MAINT0,

0AH...). LOS status is cleared by pulling LOSn pin to low.

LOS=1

signal level>P

density=OK

(observing windows= M)

signal level<Q

(observing windows= N)

• LOS detect level threshold

In short haul mode, the amplitude threshold Q is fixed on 800 mVpp,

while P=Q+200 mVpp (200 mVpp is the LOS level detect hysteresis).

In long haul mode, the value of Q can be selected by LOS[4:0] bit

(RCF1, 08H...), while P=Q+4 dB (4 dB is the LOS level detect hysteresis).

The LOS[4:0] default value is 10101 (-46 dB).

• Criteria for declare and clear of a LOS detect

The detection supports the ANSI T1.231 and I.431 for T1/J1 mode and

G.775 and ETSI 300233/I.431 for E1 mode. The criteria can be selected

by LAC bit (MAINT0, 0AH...) and T1E1 bit (GCF0, 40H).

Table-17 and Table-18 summarize LOS declare and clear criteria for

both short haul and long haul application.

• All Ones output during LOS

On the system side, the RDPn/RDNn will reflect the input pulse “transi-

tion” at the RTIPn/RRINGn side and output recovery clock (but the quality

of the output clock can not be guaranteed when the input level is lower than

the maximum receive sensitivity) when AISE bit (MAINT0, 0AH...) is 0; or

output All Ones as AIS when AISE bit (MAINT0, 0AH...) is 1. In this case

RCLKn output is replaced by MCLK.

On the line side, the TTIPn/TRINGn will output All Ones as AIS when

ATAO bit (MAINT0, 0AH...) is 1. The All Ones pattern uses MCLK as the

reference clock.

LOS indicator is always active for all kinds of loopback modes.

LOS=0

Figure-14 LOS Declare and Clear

Table-17 LOS Declare and Clear Criteria for Short Haul Mode

Control bit

LOS declare threshold

T1E1

LAC

1=T1/J1

0=T1.231

Level < 800 mVpp

N=175 bits

1=I.431

Level < 800 mVpp

N=1544 bits

0=G.775

0=E1

Level < 800 mVpp

N=32 bits

1=I.431/ETSI

Level < 800 mVpp

N=2048 bits

LOS clear threshold

Level > 1 Vpp

M=128 bits

12.5% mark density

<100 consecutive zeroes

Level > 1 Vpp

M=128 bits

12.5% mark density

<100 consecutive zeroes

Level > 1 Vpp

M=32 bits

12.5% mark density

<16 consecutive zeroes

Level > 1 Vpp

M=32 bits

12.5% mark density

<16 consecutive zeroes

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