IDT71V421L Просмотр технического описания (PDF) - Integrated Device Technology
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IDT71V421L Datasheet PDF : 14 Pages
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IDT71V321/71V421S/L
High Speed 3.3V 2K x 8 Dual-Port Static RAM with Interrupts
Industrial and Commercial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range(1,2) (VCC = 3.3V ± 0.3V)
71V321X25
71V421X25
Com'l
& Ind
71V321X35
71V421X35
Com'l Only
71V321X55
71V421X55
Com'l Only
Symbol
Parameter
Test Condition
Version
Typ. Max. Typ. Max. Typ. Max. Unit
ICC Dynamic Operating
Current
(Both Ports Active)
CE = VIL, Outputs Disabled
SEM = VIH
f = fMAX(3)
COM'L S 55
130
55
125
55
115 mA
L 55
100
55
95
55
85
IND
S 55
150
___
___
___
___
L 55
130
ISB1 Standby Current
(Both Ports - TTL
Level Inputs)
CER = CEL = VIH
SEMR = SEML = VIH
f = fMAX(3)
COM'L S 15
35
15
35
15
35 mA
L 15
20
15
20
15
20
IND
S 15
50
___
___
___
___
L 15
35
ISB2 Standby Current
(One Port - TTL
Level Inputs)
CE"A" = VIL and CE"B" = VIH(5)
Active Port Outputs Disabled,
f=fMAX(3)
SEMR = SEML = VIH
COM'L S 25
75
25
70
25
60 mA
L 25
55
25
50
25
40
IND
S 25
95
___
___
___
___
L 25
75
ISB3 Full Standby Current Both Ports CEL and
(Both Po rts - All
CER > VCC - 0.2V
CMOS Level Inputs) VIN > VCC - 0.2V or
VIN < 0.2V, f = 0(4)
SEMR = SEML > VCC - 0.2V
COM'L S 1.0
5
1.0
5
1.0
5 mA
L 0.2
3
0.2
3
0.2
3
IND
S 1.0
10
___
___
___
___
L 0.2
6
ISB4 Full Standby Current CE"A" < 0.2V and
(One Port - All
CE"B" > VCC - 0.2V(5)
CMOS Level Inputs) SEMR = SEML > VCC - 0.2V
VIN > VCC - 0.2V or VIN < 0.2V
Active Port Outputs Disabled
f = fMAX(3)
COM'L S 25
70
25
65
25
55 mA
L 25
55
25
50
25
40
IND
S 25
85
___
___
___
___
L 25
70
NOTES:
3026 tbl 06
1. 'X' in part numbers indicates power rating (S or L).
2. VCC = 3.3V, TA = +25°C, and are not production tested. ICCDC = 70mA (Typ.).
3. At f = fMAX, address and control lines (except Output Enable) are cycling at the maximum frequency read cycle of 1/tRC and using "AC Test Conditions" of input levels
of GND to 3V.
4. f = 0 means no address or control lines change. Applies only to inputs at CMOS level standby.
5. Port "A" may be either left or right port. Port "B" is opposite from port "A".
Data Retention Characteristics (L Version Only)
Symbol
Parameter
Test Condition
VDR
VCC for Data Retention
ICCDR
Data Retention Current
VCC = 2V, CE > VCC - 0.2V
COM'L.
tCDR(3)
Chip Deselect to Data
Retention Time
VIN > VCC - 0.2V or VIN < 0.2V
IND.
tR(3)
Operation Recovery Time
NOTES:
1. VCC = 2V, TA = +25°C, and is not production tested.
2. tRC = Read Cycle Time.
3. This parameter is guaranteed by device characterization but not production tested.
Min.
2.0
___
___
0
tRC(2)
Typ. (1)
___
100
100
___
___
Max. Unit
0
V
1500
µA
4000
µA
___
V
___
V
3026 tbl 07
6.442
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