HEF4014BT Просмотр технического описания (PDF) - Philips Electronics

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HEF4014BT

8-bit static shift register

Philips Electronics 

Philips Semiconductors

8-bit static shift register

Product specification

HEF4014B

MSI

DESCRIPTION

The HEF4014B is a fully synchronous edge-triggered 8-bit

static shift register with eight synchronous parallel inputs

(P0 to P7), a synchronous serial data input (DS), a

synchronous parallel enable input (PE), a LOW to HIGH

edge-triggered clock input (CP) and buffered parallel

outputs from the last three stages (O5 to O7).

Operation is synchronous and the device is edge-triggered

on the LOW to HIGH transition of CP. Each register stage

is of a D-type master-slave flip-flop. When PE is HIGH,

data is loaded into the register from P0 to P7 on the LOW

to HIGH transition of CP. When PE is LOW, data is shifted

to the first position from DS, and all the data in the register

is shifted one position to the right on the LOW to HIGH

transition of CP. Schmitt-trigger action in the clock input

makes the circuit highly tolerant to slower clock rise and

fall times

Fig.1 Functional diagram.

Fig.2 Pinning diagram.

HEF4014BP(N): 16-lead DIL; plastic

(SOT38-1)

HEF4014BD(F): 16-lead DIL; ceramic (cerdip)

(SOT74)

HEF4014BT(D): 16-lead SO; plastic

(SOT109-1)

( ): Package Designator North America

FAMILY DATA, IDD LIMITS category MSI

See Family Specifications

January 1995

2

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