GS8160Z18T-225 Просмотр технического описания (PDF) - Giga Semiconductor
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GS8160Z18T-225 Datasheet PDF : 24 Pages
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100-Pin TQFP Pin Descriptions
Pin Location
Symbol
37, 36
35, 34, 33, 32, 100, 99, 84, 83,
82, 81, 44, 45, 46,47, 48, 49, 50
A0, A1
A2–A18
80
A19
89
CK
93
BA
94
BB
95
BC
96
BD
88
W
98
E1
97
E2
92
E3
86
G
85
ADV
87
CKE
58, 59, 62,63, 68, 69, 72, 73, 74
8, 9, 12, 13, 18, 19, 22, 23, 24
51, 52, 53, 56, 57, 75, 78, 79,
1, 2, 3, 6, 7, 25, 28, 29, 30
DQA1–DQA9
DQB1–DQB9
NC
51, 52, 53, 56, 57, 58, 59, 62,63 DQA1–DQA9
68, 69, 72, 73, 74, 75,
78, 79, 80
DQB1–DQB9
1, 2, 3, 6, 7, 8, 9, 12, 13
18, 19, 22, 23, 24, 25, 28, 29, 30
64
DQC1–DQC9
DQD1–DQD9
ZZ
14
FT
31
LBO
15, 16, 41, 65, 91
VDD
5,10, 17, 21, 26, 40, 55, 60, 67,
71, 76, 90
VSS
4, 11, 20, 27, 54, 61, 70, 77
38, 39, 42, 43, 66
VDDQ
NC
Type
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
I/O
I/O
—
I/O
I/O
I/O
I/O
In
In
In
In
In
In
—
Preliminary
GS8160Z18/36T-225/200/180/166/150/133
Description
Burst Address Inputs; Preload the burst counter
Address Inputs
Address Input (x18 Version Only)
Clock Input Signal
Byte Write signal for data inputs DQA1-DQA9; active low
Byte Write signal for data inputs DQB1-DQB9; active low
Byte Write signal for data inputs DQC1-DQC9; active low (x36 Versions Only)
Byte Write signal for data inputs DQD1-DQD9; active low (x36 Versions Only)
Write Enable; active low
Chip Enable; active low
Chip Enable; Active High. For self decoded depth expansion
Chip Enable; Active Low. For self decoded depth expansion
Output Enable; active low
Advance/Load; Burst address counter control pin
Clock Input Buffer Enable; active low
Byte A Data Input and Output pins (x18 Version Only)
Byte B Data Input and Output pins (x18 Version Only)
No Connect (x18 Version Only)
Byte A Data Input and Output pins (x36 Versions Only)
Byte B Data Input and Output pins (x36 Versions Only)
Byte C Data Input and Output pins (x36 Versions Only)
Byte D Data Input and Output pins (x36 Versions Only)
Power down control; active high
Pipeline/Flow Through Mode Control; active low
Linear Burst Order; active low
Core power supply
Ground
Output driver power supply
No Connect
Rev: 2.10 3/2001
4/24
© 1998, Giga Semiconductor, Inc.
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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