GAL16V8Z Просмотр технического описания (PDF) - Lattice Semiconductor
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GAL16V8Z Datasheet PDF : 19 Pages
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Specifications GAL16V8Z
SpecificationGs GALA1L61V68VZ8DZ
AC Switching Characteristics
Over Recommended Operating Conditions
TEST
PARAMETER COND1.
DESCRIPTION
tpd
A
Input or I/O to Combinational Output
tco
A
Clock to Output Delay
tcf2
— Clock to Feedback Delay
tsu
— Setup Time, Input or Feedback before Clock↑
th
— Hold Time, Input or Feedback after Clock↑
A
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
fmax3
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
A
Maximum Clock Frequency with
No Feedback
twh
— Clock Pulse Duration, High
twl
— Clock Pulse Duration, Low
ten
B
Input or I/O to Output Enabled
B
OE to Output Enabled
tdis
C
Input or I/O to Output Disabled
C
OE to Output DIsabled
tas
— Last Active Input to Standby
tsa4
— Standby to Active Output
COM
-12
MIN. MAX.
3 12
COM
-15
UNITS
MIN. MAX.
3
15
ns
2
8
2
10
ns
—6—7
ns
10 — 15 —
ns
0
—
0
—
ns
55 — 40 — MHz
62.5 — 45.5 — MHz
83.3 — 62.5 — MHz
6
—
8
—
ns
6
—
8
—
ns
— 12 — 15
ns
— 12 — 15
ns
— 15 — 15
ns
— 12 — 15
ns
60 140 50 150 ns
6
13
5
15
ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Specification section.
3) Refer to fmax Specification section.
4) Add tsa to tpd, tsu, ten and tdis when the device is coming out of standby state.
Standby Power Timing Waveforms
Icc
POWER
Isb
tas
INPUT or
I/O FEEDBACK
OE
CLK
OUTPUT
tsa
tpd
ten, tdis
*
tsu
tco
* Note: Rising clock edges
are allowed during tsa but
outputs are not guaranteed.
11
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