FM93C46 Просмотр технического описания (PDF) - Fairchild Semiconductor
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Компоненты Описание
производитель
FM93C46 Datasheet PDF : 13 Pages
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Timing Diagrams
SYNCHRONOUS DATA TIMING
CS
tCSS
tSKH
tSKL
SK
tDIS tDIH
Valid
DI
Input
tPD
DO (Data Read)
tSV
DO (Status Read)
Valid
Input
tDH
tPD
Valid
Output
Valid
Output
Valid Status
tCSH
tDF
tDF
NORMAL READ CYCLE (READ)
tCS
CS
SK
1 1 0 A5 A4
A1
DI
Start Opcode
Address
Bit Bits(2)
Bits(6)
High - Z
DO
93C46:
Address bits pattern -> User defined
A0 ;;;;;;;;;;;;;;
;;;;;;;;;;;;;;
0 D15
;;; D1 D0
Dummy
Bit
;;;
WRITE ENABLE CYCLE (WEN)
tCS
CS
SK
1 0 0 A5 A4
A1 A0
DI
Start Opcode
Address
Bit Bits(2)
Bits(6)
High - Z
DO
93C46:
Address bits pattern -> 1-1-x-x-x-x; (x -> Don't Care, can be 0 or 1)
FM93C46 Rev. D.1
8
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