Block Diagrams
VCC
vreg
IN
DEADTIME
500kΩ
CONTROL
PULSE
GENERATOR
VB
UVLO
R
PULSE
RQ
HO
FILTER
S
VS
SD/DT
vreg
VCC
500kΩ
DELAY
UVLO
VCC
LO
COM
Pin Assignments
1
VCC
2
IN
VB 8
7
HO
3 SD/DT VS 6
4 COM LO 5
Pin Definitions
Pine Number
1
2
3
4
5
6
7
8
Pin Name
VCC
IN
SD/DT
COM
LO
VS
HO
VB
I/O
Pin Function Description
P
Driver supply voltage
I
Logic input for high and low side gate drive output
I
Shut down input and dead time setting
P
Ground
A
Low side gate drive output for MOSFET Gate connection
A
High side floating offset for MOSFET Source connection
A
High side drive output for MOSFET Gate connection
P
Driver output stage supply
2
FAN7080_F085 Rev. 1.0.2
www.fairchildsemi.com