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FAN4852 Просмотр технического описания (PDF) - Fairchild Semiconductor

Номер в каталоге
Компоненты Описание
производитель
FAN4852
Fairchild
Fairchild Semiconductor 
FAN4852 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
Layout Considerations
General layout and supply bypassing play major roles
in high-frequency performance. Fairchild evaluation
boards help guide high-frequency layout and aid in
device testing and characterization. Follow the steps
below as a basis for high-frequency layout:
1. Include 6.8μF and 0.01μF ceramic capacitors.
2. Place the 6.8μF capacitor within 0.75 inches of
the power pin.
3. Place the 0.01μF capacitor within 0.1 inches of
the power pin.
4. Remove the ground plane under and around the
part, especially near the input and output pins, to
reduce parasitic capacitance.
Minimize all trace lengths to reduce series
inductances.
Refer to the evaluation board layouts shown in Figure
33 for more information.
When evaluating only one channel, complete the
following on the unused channel:
1. Ground the non-inverting input.
2. Short the output to the inverting input.
Evaluation Board
Description
FAN4852-010 Single Channel, Dual Supply
+IN 1
V+
SMA
- IN 1 R2 0.0
SMA
+IN 2
SMA
R4 0.0
3+
1
2-
R5
R3
50
10K
R1 10K V-
V+
V-
V+
R6 0.0
R-C4
10K
OUT 1
SMA
C9
C10
1uF
0.1uF
C11
C12
1uF
0.1uF
V+
GND
V-
PWRCON
- IN 2 R8 0.0
SMA
R10 0.0
5+
7
6-
R11
R9
50
10K
R7 10K V-
R12 0.0
R-C8
10K
OUT 2
SMA
Figure 33. Evaluation Board Schematic
© 2010 Fairchild Semiconductor Corporation
FAN4852 • Rev. 4.0.0
14
www.fairchildsemi.com

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