LTC1283ACN Просмотр технического описания (PDF) - Linear Technology
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LTC1283ACN Datasheet PDF : 24 Pages
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LTC1283
APPLICATI S I FOR ATIO
Texas Instruments TMS70C42
The TMS70C42 transfers serial data in 8-bit increments,
LSB-first. To accommodate this, the LTC1283 is pro-
grammed for 16-bit word length and LSB-first format. The
10-bit output data is received by the processor as two
8-bit bytes, LSB-first. The LTC1283 fills the final 6 unused
bits (after the MSB) with zeroes.
Hardware and Software Interface to TI TMS70C42 Processor
ANALOG
INPUTS
LTC1283
CS
SCLK
•
•
•
DIN
•
DOUT
TMS70C42
AO
SCLK
TXD
RXD
LTC1283 • AI15
DOUT from LTC1283 stored in TMS70C42 RAM
LSB
7 6 5 4 3 2 1 0 BYTE 1
FILL WITH ZEROES
MSB
0 0 0 0 0 0 9 8 BYTE 2
LTC1283 • AI16
LABEL
START
LOOP
SXTNBIT
MNEMONIC
DINT
MOVP
MOVP
MOV
LDSP
MOVP
MOVP
MOVP
MOVP
MOVP
MOVP
MOVP
MOVP
MOV
CALL
MOV
MOV
ANDP
MOVP
% > 2A, P0
% > 02, P16
% > 60, B
% > DF, P5
% > 08, P6
% > 40, P21
% > 0C, P20
% > 00, P24
% > 00, P21
% > 00, P23
% > C0, P24
% > DF, A
SXTNBIT
B, R5
A, R6
% > FE, P4
A, P26
DESCRIPTION
DISABLES ALL INTERRUPTS
DISABLE INTERRUPT FLAGS
DISABLE INTERRUPT FLAGS
ADDRESS OF STACK
PUT ADDRESS INTO POINTER
CONFIGURE PORT A
ENABLE Tx BY SETTING B3 = 1
RESET THE SERIAL PORT
CONFIGURE THE SERIAL PORT
TURN START BIT OFF
ENABLE THE SERIAL PORT
SET SCLK RATE (TIMER 3)
START TIMER
LOAD DIN WORD IN A
ROUTINE THAT SHIFTS DATA
PUT FIRST 8 LSBs IN R5
PUT MSBs IN R6
A0 CLEARED (CS GOES LOW)
PUT DIN INTO TXBUF
Parallel Port Microprocessors
When interfacing the LTC1283 to an MPU which has a
parallel port, the serial signals are created on the port with
software. Three MPU port lines are programmed to create
the CS, SCLK and DIN signals for the LTC1283. A fourth
port line reads the DOUT line. An example is made of the
Signetics 83CL410.
Hardware and Software Interface to Signetics 83CL410 Processor
ANALOG
INPUTS
LTC1283
DOUT
•
•
DIN
•
•
SCLK
•
•
CS
•
•
ACLK
83CL410
P1.1
P1.2
P1.3
P1.4
ALE
LTC1283 • AI17
LABEL
WAIT1
WAIT2
MNEMONIC
MOVP
MOVP
MOVP
MOVP
MOV
DJNZ
NOP
MOVP
MOVP
MOVP
MOVP
MOVP
MOVP
MOV
DJNZ
NOP
MOVP
ORP
RETS
% > 40, P24
% > 17, P21
% > C0, P24
% > 16, P21
% > 02, A
A, WAIT1
P25, B
A, P26
% > 40, P24
% > 17, P21
% > C0, P24
% > 16, P21
% > 02, A
A, WAIT2
P25, A
% > 01, P4
DESCRIPTION
SCLK OFF (TIMER 3 DISABLED)
ENABLE SERIAL PORT
SCLK ON (TRANSFER BEGINS)
TXEN GOES LOW
LOAD COUNTER
LOOP WHILE SHIFT OCCURS
DELAY
PUT DOUT IN B
LOAD TXBUF
SCLK OFF (TIMER 3 DISABLE)
ENABLE SERIAL PORT
SCLK ON (TRANSFER BEGINS)
TXEN GOES LOW
LOAD COUNTER
LOOP WHILE SHIFT OCCURS
DELAY
PUT DOUT IN A
A0 SET (CS GOES HIGH)
RETURN TO MAIN PROGRAM
Signetics 83CL410
To interface to the 83CL410, (a 3V version of the 80C51)
the LTC1283 is programmed for MSB-first format and 10-
bit word length. The 83CL410 generates CS, SCLK and DIN
on three port lines and reads DOUT on the fourth.
DOUT from LTC1283 stored in 83CL410 RAM
MSB*
R2 B9 B8 B7 B6 B5 B4 B3 B2
LSB
R3 B1 B2 0 0 0 0
*B9 IS MSB IN UNIPOLAR OR
SIGN BIT IN BIPOLAR
00
LTC1283 • AI18
15
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