Index
A
ac electrical characteristics 4
B
Boundary Scan (JTAG Port) timing diagram 53
bus
external address 4
external data 4
wait states selection guide 21
write access 28
out of page and refresh timings
11 wait states 23
15 wait states 25
4 wait states 21
Page mode
read accesses 20
wait states selection guide 15
write accesses 19
Page mode timings
3 wait states 16
4 wait states 17
refresh access 29
DSP56300 Family Manual 3
C
E
Clock 4
clock
external 4
operation 5
clocks
internal 4
D
DAX 18
dc electrical characteristics 3
design considerations
electrical 3
PLL 4
power consumption 3
thermal 1
Digital Audio Transmitter 18
DRAM
out of page
electrical design considerations 3
Enhanced Serial Audio Interface 13, 16
ESAI 13, 16
receiver timing 49, 50
timings 45
transmitter timing 48
EXTAL jitter 4
external address bus 4
external bus control 4, 5, 6
external clock operation 4
external data bus 4
external interrupt timing (negative edge-triggered)
11
external level-sensitive fast interrupt timing 10
external memory access (DMA Source) timing 12
External Memory Expansion Port 4, 12
Freescale Semiconductor
DSP56367 Technical Data, Rev. 2.1
Index-1