Figure 1. BLOCK DIAGRAM
DS2720
DQ
1-WIRE INTERFACE
AND CONTROL
PS
TEMP SENSOR
(Tdevice)
64-BIT ROM
LOCKABLE EEPROM
STATUS/CONTROL
+
+
TMAX
OUTPUT BUFFER
CP
VDD
+
+
VOV
VCE
++
DELAY
tOVD
SQ
CC
R
VUV
VSS
++
DELAY
tUVD
SQ
L
O
R
G
DC
(1)
I
C
RTST
(2)
PLS
+
+
VOC
+
+
VCH
VSC
++
DELAY
tOCD
DELAY
tSCD
1) Normally open, closed to enable test current, ITST
2) Normally open, closed to enable test current, ITST, and recovery charge
(See Rechargeable Li+ Protection Circuitry section for more information.)
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