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DS1372 Просмотр технического описания (PDF) - Maxim Integrated

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DS1372 Datasheet PDF : 12 Pages
First Prev 11 12
I2C, 32-Bit, Binary Counter Clock with 64-Bit ID
2) Slave transmitter mode (DS1372 read mode): The
first byte is received and handled as in the slave
receiver mode. However, in this mode, the direction
bit indicates that the transfer direction is reversed.
The DS1372 transmits serial data on SDA while the
serial clock is input on SCL. START and STOP con-
ditions are recognized as the beginning and end of
a serial transfer (see Figure 7). The slave address
byte is the first byte received after the master gener-
ates the START condition. The slave address byte
contains the 7-bit DS1372 address, which is 110100
and AD0. Each slave address is followed by the
direction bit (R/W), which is one for a read. The bit
position signified by A is compared to the value on
the AD0 pin. After receiving and decoding the slave
address byte, the device outputs an acknowledge
on the SDA line. The DS1372 then begins to transmit
data starting with the register address pointed to by
the register pointer. If the register pointer is not writ-
ten to before the initiation of a read mode, the first
address that is read is the last one stored in the reg-
ister pointer. The DS1372 must receive a "not
acknowledge" to end a read.
<SLAVE ADDRESS> <R/W> <WORD ADDRESS (n)>
S 110100 AD0 0 A
XXXXXXXX
A
S - START
A - ACKNOWLEDGE (ACK)
SLAVE TO MASTER
P - STOP
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
<DATA (n)>
<DATA (n + 1)>
<DATA (n + X)
XXXXXXXX
A
XXXXXXXX
A ... XXXXXXXX
MASTER TO SLAVE
DATA TRANSFERRED
(X + 1 BYTES + ACKNOWLEDGE)
AP
Figure 6. Data Write—Slave Receiver Mode
<SLAVE ADDRESS> <R/W>
<DATA (n)>
S 110100 AD0 1 A
XXXXXXXX
A
S - START
MASTER TO SLAVE
A - ACKNOWLEDGE (ACK)
P - STOP
A - NOT ACKNOWLEDGE (NACK)
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
<DATA (n + 1)>
<DATA (n + 2)>
<DATA (n + X)>
XXXXXXXX
A
XXXXXXXX
A ...
XXXXXXXX
SLAVE TO MASTER
DATA TRANSFERRED
(X + 1 BYTES + ACKNOWLEDGE)
NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK.
AP
Figure 7. Data Read (from Current Pointer Location)—Slave Transmitter Mode
<SLAVE ADDRESS> <R/W> <WORD ADDRESS (n)> <SLAVE ADDRESS (n)> <R/W>
S 110100A AD0 0 A
XXXXXXXX
A Sr 110100A AD0 1 A
<DATA (n)>
<DATA (n + 1)>
<DATA (n + 2)>
<DATA (n + X)>
XXXXXXXX
A
XXXXXXXX
A
XXXXXXXX
A ... XXXXXXXX
AP
S - START
Sr - REPEATED START
MASTER TO SLAVE
A - ACKNOWLEDGE (ACK)
P - STOP
A - NOT ACKNOWLEDGE (NACK)
R/W - READ/WRITE OR DIRECTION BIT ADDRESS
SLAVE TO MASTER
DATA TRANSFERRED
(X + 1 BYTES + ACKNOWLEDGE)
NOTE: LAST DATA BYTE IS FOLLOWED BY A NACK.
Figure 8. Data Read (Write Pointer, Then Read)—Slave Receive and Transmit
______________________________________________________________________________________ 11

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