
Function Tables
E
L
H
L
H
C
Mode
H Addressable Latch
H Memory
L Active HIGH Eight Channel Demultiplexer
L Clear
Inputs
Present Output States
C E D A0 A1 A2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Mode
L
H
X
X
X
X
L
L
L
L
L
L
L
L
Clear
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
HH
L
L
L
H
L
L
L
L
L
L
Demultiplex
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
L
L
HHH
H
L
L
L
L
L
L
L
H
H
H
X
X
X
X QN−1
H
L
L
L
L
L
L QN−1 QN−1 QN−1
H
L
H
L
L
L
H QN−1 QN−1
H
L
L
H
L
L QN−1 L QN−1
H
L
H
H
L
L QN−1 H QN−1
•
•
•
•
•
•
•
•
•
•
Memory
Addressable
Latch
•
•
•
•
•
H
L
L
HH
H QN−1
H
L
H
H
H
H QN−1
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care Condition
QN−1 = Previous Output State
QN−1 L
QN−1 H
Logic Diagram
www.fairchildsemi.com
2