Timing Waveforms
Data Retention Waveform
VCC
DATA RETENTION MODE
tCDR
CE
Read Cycle 1 [9, 10]
Address
Data Out
Read Cycle 2 [11, 12]
tAA
tOHA
Previous Data Valid
Address
tRC
tRC
CE
OE
Data Out
VCC
Current
High Z
ICC
ISB
tACE
tLZOE
tDOE
tLZCE
tPU
50%
Notes
9. Device is continuously selected. OE = VIL = CE.
10. WE is HIGH for read cycle.
11. This cycle is OE controlled and WE is HIGH read cycle.
12. Address valid before or similar with CE transition LOW.
Document #: 001-06435 Rev. *B
CY7C199CN
tR
Data Valid
tHZCE
tHZOE
Data Valid
High Z
tPD
50%
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