CY7C1041D Просмотр технического описания (PDF) - Cypress Semiconductor

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CY7C1041D

4-Mbit (256K x 16) Static RAM

Cypress Semiconductor 

Switching Waveforms (continued)

Write Cycle No. 2 (BLE or BHE Controlled)

tWC

ADDRESS

BHE, BLE

WE

CE

DATAI/O

tSA

tAW

tBW

tPWE

tSCE

tSD

Write Cycle No. 3 (WE Controlled, OE HIGH During Write)[16, 17]

ADDRESS

CE

WE

tWC

tSCE

tAW

tSA

tPWE

OE

BHE, BLE

DATA I/O

NOTE 19

t

HZOE

tSD

DATAIN VALID

Note:

19. During this period the I/Os are in the output state and input signals should not be applied.

CY7C1041D

tHA

tHD

tHA

tHD

Document #: 38-05472 Rev. *C

Page 6 of 9

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