CY14B101I Просмотр технического описания (PDF) - Cypress Semiconductor
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CY14B101I Datasheet PDF : 42 Pages
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PRELIMINARY
CY14C101I
CY14B101I, CY14E101I
Figure 13. Single-Byte Write into nvSRAM (Hs-mode)
By Master
SDA Line
S
T
A
R Hs-mode command
T
S00 0 01 XX X
Memory Slave Address
Sr 1 0 1 0 A2 A1 A16 0
Address MSB
Address LSB
By nvSRAM
A
A
A
A
Figure 14. Multi-Byte Write into nvSRAM (Hs-mode)
By Master
SDA Line
S
T
A
R Hs-mode command
T
S00 0 01 XX X
Memory Slave Address
Sr 1 0 1 0 A2 A1 A16 0
Address MSB
Address LSB
By nvSRAM
By Master
SDA Line
A
A
A
A
Data Byte 2
Data Byte 3
S
T
Data Byte N
0
P
P
By nvSRAM
A
A
A
Data Byte
S
T
0
P
P
A
Data Byte 1
A
Document #: 001-54391 Rev. *C
Page 12 of 42
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