ADT7516ARQ(RevA) Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге

Компоненты Описание

производитель

ADT7516ARQ
(Rev.:RevA)

SPI/I2C Compatible, Temperature Sensor, 4-Channel ADC and Quad Voltage Output DAC

Analog Devices 

RD/WR

Address

15h

16h

17h

18h

19h

1Ah

1Bh

1Ch

1Dh

1Eh

1Fh

20h

21h

22h

23h

24h

25h

26h

27h

28h

29h–2Ah

2Bh

2Bh

2Ch

2Dh

2Eh

2Fh

30h

31h–4Ch

4Dh

4Eh

4Fh

50h–7Eh

7Fh

80h–FFh

Name

DAC C MSBs

DAC D LSBs

(ADT7516/ADT7517 only)

DAC D MSBs

Control CONFIGURATION 1

Control CONFIGURATION 2

Control CONFIGURATION 3

DAC CONFIGURATION

LDAC CONFIGURATION

Interrupt Mask 1

Interrupt Mask 2

Internal Temp Offset

External Temp Offset

Internal Analog Temp Offset

External Analog Temp Offset

VDD VHIGH Limit

VDD VLOW Limit

Internal THIGH Limit

Internal TLOW Limit

External THIGH/AIN1 VHIGH

Limits

External TLOW/AIN1 VLOW Limits

Reserved

AIN2 VHIGH Limit

AIN2 VHIGH Limit

AIN2 VLOW Limit

AIN3 VHIGH Limit

AIN3 VLOW Limit

AIN4 VHIGH Limit

AIN4 VLOW Limit

Reserved

Device ID

Manufacturer’s ID

Silicon Revision

Reserved

SPI Lock Status

Reserved

Power-On

Default

00h

00h

00h

00h

00h

00h

00h

00h

00h

00h

00h

00h

D8h

D8h

C7h

62h

64h

C9h

FFh

00h

FFh

FFh

00h

FFh

00h

FFh

00h

03h/0Bh/07h

41h

04h

00h

00h

00h

Interrupt Status 1 Register (Read-Only) [Add. = 00h]

This 8-bit read-only register reflects the status of some of the

interrupts that can cause the INT/INT pin to go active. This

register is reset by a read operation, provided that any out-of-

limit event has been corrected. It is also reset by a software reset.

Table 11. Interrupt Status 1 Register

D7 D6 D5 D4 D3 D2 D1 D0

0* 0* 0* 0* 0* 0* 0* 0*

*Default settings at power-up.

ADT7516/ADT7517/ADT7519

Table 12.

Bit Function

D0 1 when the internal temperature value exceeds THIGH limit.

Any internal temperature reading greater than the set limit

will cause an out-of-limit event.

D1 1 when internal temperature value exceeds TLOW limit. Any

internal temperature reading less than or equal to the set

limit will cause an out-of-limit event.

D2 This status bit is linked to the configuration of Pins 7 and 8.

If configured for external temperature sensor, this bit is 1

when external temperature value exceeds THIGH limit. The

default value for this limit register is –1°C, so any external

temperature reading greater than the set limit will cause

an out-of-limit event. If configured for AIN1 and AIN2, this

bit is 1 when AIN1 input voltage exceeds VHIGH or VLOW

limits.

D3 1 when external temperature value exceeds TLOW limit. The

default value for this limit register is 0°C, so any external

temperature reading less than or equal to the set limit will

cause an out-of-limit event.

D4 1 Indicates a fault (open or short) for the external

temperature sensor.

D5 1 when AIN2 voltage is greater than its corresponding VHIGH

limit. 1 when AIN2 voltage is less than or equal to its

corresponding VLOW limit.

D6 1 when AIN3 voltage is greater than its corresponding VHIGH

limit. 1 when AIN3 voltage is less than or equal to its

corresponding VLOW limit.

D7 1 when AIN4 voltage is greater than its corresponding VHIGH

limit. 1 when AIN4 voltage is less than or equal to its

corresponding VLOW limit.

Interrupt Status 2 Register (Read-Only) [Add. = 01h]

This 8-bit read-only register reflects the status of the VDD inter-

rupt that can cause the INT/INT pin to go active. This register is

reset by a read operation, provided that any out-of-limit event

has been corrected. It is also reset by a software reset.

Table 13. Interrupt Status 2 Register

D7 D6 D5 D4 D3 D2 D1 D0

N/A N/A N/A 0* N/A N/A N/A N/A

*Default settings at power-up.

Table 14.

Bit Function

D4 1 when VDD value is greater than its corresponding VHIGH

limit. 1 when VDD is less than or equal to its corresponding

VLOW limit.

Rev. A | Page 29 of 44

Share Link: