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ADMCF326BN Просмотр технического описания (PDF) - Analog Devices

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ADMCF326BN Datasheet PDF : 36 Pages
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ADMCF326
TIMING PARAMETERS
Parameter
Clock Signals
Signal tCK is defined as 0.5 tCKIN. The ADMCF326 uses an input clock with a
frequency equal to half the instruction rate; a 10 MHz input clock (equivalent to
100 ns) yields a 50 ns processor cycle (equivalent to 20 MHz). When tCK values are
within the range of 0.5 tCKIN period, they should be substituted for all relevant
timing parameters to obtain specification value.
Example: tCKH = 0.5 tCK – 10 ns = 0.5 (50 ns) – 10 ns = 15 ns.
Timing Requirements:
tCKIN
tCKIL
tCKIH
CLKIN Period
CLKIN Width Low
CLKIN Width High
Switching Characteristics:
tCKL
tCKH
tCKOH
CLKOUT Width Low
CLKOUT Width High
CLKIN High to CLKOUT High
Control Signals
Timing Requirement:
tRSP
RESET Width Low
PWM Shutdown Signals
Timing Requirement:
tPWMTPW PWMTRIP Width Low
*Applies after Power-Up Sequence is Complete
Specifications subject to change without notice.
Min
Max
100
150
20
20
0.5 tCK – 10
0.5 tCK – 10
0
20
5 tCK*
tCK
Unit
ns
ns
ns
ns
ns
ns
ns
ns
CLKIN
CLKOUT
tCKIN
tCKIH
tCKIL
tCKOH
tCKH
tCKL
Figure 1. Clock Signals
–4–
REV. B

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