ADA4800 Просмотр технического описания (PDF) - Analog Devices

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ADA4800

Low Power, High Speed CCD Buffer Amplifier

Analog Devices 

ADA4800

APPLICATIONS INFORMATION

OPEN SOURCE CCD OUTPUT BUFFER

With low power, high slew rate, and fast settling time, the

ADA4800 is the ideal solution for an output buffer for CCD

sensors with an open source output configuration. Figure 21

shows a typical application circuit for the ADA4800 as a CCD

sensor output buffer.

The output of the CCD is connected directly to the IN pin

of the ADA4800, whose OUT pin is then ac-coupled into

the input of the analog front end.

VISF

15V

0.1µF

RISF

120kΩ

+

0.1µF 47µF

RIDRV

15V

249kΩ

0.1µF

ISF

VCC

IDRV

6

IISF

5

4

IIDRV

IBUFF

+1

ADA4800

CCD

1

IN

IAL

2

VEE

3

OUT

AFE

Figure 21. Typical Application Block Diagram

To help reduce the effects of power supply noise coupling into

the ISF and IDRV pins, use 0.1 μF ceramic bypass decoupling

capacitors. For best performance, place these capacitors as

close to each of these pins as is physically possible.

POWER SAVE MODE

The buffer of the ADA4800 consumes only 20 mW of static

power. To achieve even more power savings, the ADA4800

active load current can be switched off during standby mode

or reduced during monitoring mode. Figure 22 illustrates the

ADA4800 as an open source CCD buffer configured for using

this power save feature. Power save mode allows IAL current to

be logically controlled by connecting the ISF pin to any general-

purpose output (GPO) pin of the system microcontroller through

an external resistor. A GPO logic high enables the flow of input

sink current, while a logic low disables the input sink current

and asserts the power save mode.

VISF

0V TO 3V

GPO PIN

0.1µF

RISF

10kΩ

+

0.1µF 47µF

RIDRV

15V

249kΩ

0.1µF

ISF

VCC

IDRV

6

IISF

5

4

IIDRV

IBUFF

+1

ADA4800

CCD

1

IN

IAL

2

VEE

3

OUT

AFE

Figure 22. Using GPO to Drive ISF Voltage

Figure 23 shows an example of the ADA4800 power save feature.

GPO1

AFE

GPO2

20kΩ

20kΩ

ISF ADA4800

MAIN BOARD FPC

Figure 23. Example Block Diagram for Sink Current Selection

Three combinations of IAL are provided with Figure 23.

Selection of the IAL is controlled by the logic signals applied to

the GPO1 and GPO2 pins. Table 5 summarizes the IAL selections.

Table 5. Input Sink Current Selection

Mode

GPO1

Standby

High-Z

0

Sleep

High-Z

1

Active

1

GPO2

High-Z

0

1

High-Z

1

Resistance (kΩ)

High-Z

N/A

20

20

10

Active Load Current, IAL (mA)

0

1.90

3.36

Rev. A | Page 11 of 16

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