AD9520-1 Просмотр технического описания (PDF) - Analog Devices

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AD9520-1

12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.5 GHz VCO

Analog Devices 

Reset Modes .................................................................................49

Power-On Reset.......................................................................49

Hardware Reset via the RESET Pin ......................................49

Soft Reset via the Serial Port..................................................50

Soft Reset to Settings in EEPROM when

EEPROM Pin = 0 via the Serial Port......................................50

Power-Down Modes ...................................................................50

Chip Power-Down via PD .....................................................50

PLL Power-Down....................................................................50

Distribution Power-Down .....................................................50

Individual Clock Output Power-Down................................50

Individual Clock Channel Power-Down .............................50

Serial Control Port ..........................................................................51

SPI/I2C Port Selection ................................................................51

I2C Serial Port Operation...........................................................51

I2C Bus Characteristics...........................................................51

Data Transfer Process .............................................................52

Data Transfer Format .............................................................53

I2C Serial Port Timing............................................................53

SPI Serial Port Operation...........................................................54

Pin Descriptions......................................................................54

SPI Mode Operation...............................................................54

Communication Cycle—Instruction Plus Data..................54

Write .........................................................................................54

Read ..........................................................................................54

REVISION HISTORY

9/08—Revision 0: Initial Version

AD9520-1

SPI Instruction Word (16 Bits)..................................................55

SPI MSB/LSB First Transfers .....................................................55

EEPROM Operations .....................................................................58

Writing to the EEPROM ............................................................58

Reading from the EEPROM ......................................................58

Programming the EEPROM Buffer Segment..........................59

Register Section Definition Group.......................................59

IO_UPDATE (Operational Code 0x80) ..............................59

End-of-Data (Operational Code 0xFF) ...............................59

Pseudo-End-of-Data (Operational Code 0xFE).................59

Thermal Performance.....................................................................61

Register Map ....................................................................................62

Register Map Descriptions.............................................................67

Applications Information...............................................................82

Frequency Planning Using the AD9520 ..................................82

Using the AD9520 Outputs for ADC Clock Applications ....82

LVPECL Clock Distribution......................................................82

CMOS Clock Distribution.........................................................83

Outline Dimensions........................................................................84

Ordering Guide ...........................................................................84

Rev. 0 | Page 3 of 84

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