AD9643BCPZ-170(RevE) Просмотр технического описания (PDF) - Analog Devices
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Компоненты Описание
производитель
AD9643BCPZ-170
(Rev.:RevE)
(Rev.:RevE)
Analog Devices
AD9643BCPZ-170 Datasheet PDF : 36 Pages
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Data Sheet
Pin No.
Digital Outputs
7
6
8
9
11
12
13
14
15
16
17
18
20
21
22
23
26
27
29
30
31
32
33
34
35
36
38
39
40
41
43
42
25
24
SPI Control
45
44
46
Output Enable Bar and Power-
Down
47
48
AD9643
Mnemonic
Type
Description
ORB+
Output
ORB−
Output
B D0−/D1− (LSB)
B D0+/D1+ (LSB)
B D2−/D3−
B D2+/D3+
B D4−/D5−
B D4+/D5+
B D6−/D7−
B D6+/D7+
B D8−/D9−
B D8+/D9+
B D10−/D11−
B D10+/D11+
B D12−/D13− (MSB)
B D12+/D13+ (MSB)
A D0−/D1− (LSB)
A D0+/D1+ (LSB)
A D2−/D3−
A D2+/D3+
A D4−/D5−
A D4+/D5+
A D6−/D7−
A D6+/D7+
A D8−/D9−
A D8+/D9+
A D10−/D11−
A D10+/D11+
A D12−/D13− (MSB)
A D12+/D13+ (MSB)
ORA+
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
ORA−
Output
DCO+
DCO−
Output
Output
Channel B LVDS Overrange Output—True. The overrange
indication is valid on the rising edge of the DCO.
Channel B LVDS Overrange Output—Complement. The
overrange indication is valid on the rising edge of the DCO.
Channel B LVDS Output Data 0/Data 1—Complement.
Channel B LVDS Output Data 0/Data 1—True.
Channel B LVDS Output Data 2/Data 3—Complement.
Channel B LVDS Output Data 2/Data 3—True.
Channel B LVDS Output Data 4/Data 5—Complement.
Channel B LVDS Output Data 4/Data 5—True.
Channel B LVDS Output Data 6/Data 7—Complement.
Channel B LVDS Output Data 6/Data 7—True.
Channel B LVDS Output Data 8/Data 9—Complement.
Channel B LVDS Output Data 8/Data 9—True.
Channel B LVDS Output Data 10/Data 11—Complement.
Channel B LVDS Output Data 10/Data 11—True.
Channel B LVDS Output Data 12/Data 13—Complement.
Channel B LVDS Output Data 12/Data 13—True.
Channel A LVDS Output Data 0/Data 1—Complement.
Channel A LVDS Output Data 0/Data 1—True.
Channel A LVDS Output Data 2/Data 3—Complement.
Channel A LVDS Output Data 2/Data 3—True.
Channel A LVDS Output Data 4/Data 5—Complement.
Channel A LVDS Output Data 4/Data 5—True.
Channel A LVDS Output Data 6/Data 7—Complement.
Channel A LVDS Output Data 6/Data 7—True.
Channel A LVDS Output Data 8/Data 9—Complement.
Channel A LVDS Output Data 8/Data 9—True.
Channel A LVDS Output Data 10/Data 11—Complement.
Channel A LVDS Output Data 10/Data 11—True.
Channel A LVDS Output Data 12/Data 13—Complement.
Channel A LVDS Output Data 12/Data 13—True.
Channel A LVDS Overrange Output—True. The overrange
indication is valid on the rising edge of the DCO.
Channel A LVDS Overrange Output—Complement. The
overrange indication is valid on the rising edge of the DCO.
Channel A/Channel B LVDS Data Clock Output—True.
Channel A/Channel B LVDS Data Clock Output—
Complement.
SCLK
SDIO
CSB
Input
Input/Output
Input
SPI Serial Clock.
SPI Serial Data Input/Output.
SPI Chip Select (Active Low).
OEB
PDWN
Input
Input
Output Enable Bar Input (Active Low).
Power-Down Input (Active High). The operation of this pin
depends on the SPI mode and can be configured as power-
down or standby (see Table 14).
Rev. E | Page 15 of 36
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