AD9553BCPZ(Rev0) Просмотр технического описания (PDF) - Analog Devices

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производитель

AD9553BCPZ
(Rev.:Rev0)

Flexible Clock Translator for GPON, Base Station, SONET/SDH, T1/E1, and Ethernet

Analog Devices 

AD9553

SPECIFICATIONS

POWER CONSUMPTION

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

TOTAL CURRENT

162

185

mA

Tested with both output channels active at

maximum output frequency. LVPECL and

LVDS outputs use a 100 Ω termination

between both pins of the output driver.

VDD CURRENT BY PIN

Tested with both output channels active at

maximum output frequency. LVPECL and

LVDS outputs use a 100 Ω termination

between both pins of the output driver.

Pin 18

93

106

mA

Pin 21

LVDS Configured Output

35

41

mA

LVPECL Configured Output

36

42

mA

CMOS Configured Output

29

34

mA

Pin 28

LVDS Configured Output

35

41

mA

LVPECL Configured Output

36

42

mA

CMOS Configured Output

29

34

mA

LOGIC INPUT PINS

Table 2.

Parameter

INPUT CHARACTERISTICS1

Logic 1 Voltage, VIH

Logic 0 Voltage, VIL

Logic 1 Current, IIH

Logic 0 Current, IIL

Min

Typ

1.02

Max

Unit

Test Conditions/Comments

V

0.64

V

3

μA

17

μA

For the CMOS inputs, a static Logic 1 results

from either a pull-up resistor or no connection.

1 The A[3:0] and Y[5:0] pins have 100 kΩ internal pull-up resistors. The OM[2:0] pins have 40 kΩ pull-up resistors when the device is not in SPI mode.

LOGIC OUTPUT PINS

Table 3.

Parameter

OUTPUT CHARACTERISTICS

Output Voltage High, VOH

Output Voltage Low, VOL

Min

Typ

2.7

Max

Unit

Test Conditions/Comments

V

0.19

V

Tested at 1 mA load current

Tested at 1 mA load current

Rev. 0 | Page 3 of 44

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