AD5450(RevPrD) Просмотр технического описания (PDF) - Analog Devices

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AD5450
(Rev.:RevPrD)

8/10/12/14-Bit High Bandwidth Multiplying DACs with Serial Interface

Analog Devices 

PRELIMINARY TECHNICAL DATA

AD5450/AD5451/AD5452/AD5453

Table II. Bipolar Code Table

Digital Input Analog Output (V)

1111 1111

1000 0000

0000 0001

0000 0000

+VREF (127/128)

0

-VREF (127/128)

-VREF (128/128)

Stability

In the I-to-V configuration, the IOUT of the DAC and the

inverting node of the op amp must be connected as close

as possible, and proper PCB layout techniques must be

employed. Since every code change corresponds to a step

function, gain peaking may occur if the op amp has

limited GBP and there is excessive parasitic capacitance at

the inverting node. This parasitic capacitance introduces a

pole into the open loop response which can cause ringing

or instability in the closed loop applications circuit.

An optional compensation capacitor, C1 can be added in

parallel with RFB for stability as shown in figures 3 and 4.

Too small a value of C1 can produce ringing at the

output, while too large a value can adversely affect the

settling time. C1 should be found empirically but 1-2pF is

generally adequate for the compensation.

SINGLE SUPPLY APPLICATIONS

Voltage Switching Mode of Operation

Figure 5 shows these DACs operating in the voltage-

switching mode. The reference voltage, VIN is applied to

the IOUT1 pin, IOUT2 is connected to AGND and the

output voltage is available at the VREF terminal. In this

configuration, a positive reference voltage results in a

positive output voltage making single supply operation

possible. The output from the DAC is voltage at a

constant impedance (the DAC ladder resistance). Thus an

op-amp is necessary to buffer the output voltage. The

reference input no longer sees a constant input impedance,

but one that varies with code. So, the voltage input should

be driven from a low impedance source.

VDD

R1

R2

RFB VDD

VIN

IOUT1

VREF

GND

VOUT

NOTES:

1ADDITIONAL PINS OMITTED FOR CLARITY

2C1 PHASE COMPENSATION (1pF-5pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

Figure 5. Single Supply Voltage Switching Mode Operation.

It is important to note that VIN is limited to low voltages

because the switches in the DAC ladder no longer have

the same source-drain drive voltage. As a result their on

resistance differs and this degrades the integral linearity of

the DAC. Also, VIN must not go negative by more than

0.3V or an internal diode will turn on, exceeding the max

ratings of the device. In this type of application, the full

range of multiplying capability of the DAC is lost.

POSITIVE OUTPUT VOLTAGE

Note that the output voltage polarity is opposite to the

VREF polarity for dc reference voltages. In order to achieve

a positive voltage output, an applied negative reference to

the input of the DAC is preferred over the output

inversion through an inverting amplifier because of the

resistors tolerance errors. To generate a negative

reference, the reference can be level shifted by an op amp

such that the VOUT and GND pins of the reference

become the virtual ground and -2.5V respectively as

shown in Figure 6.

ADR03

VOUT VIN

GND

+ 5V

-2.5V

VREF

1/2 AD8552

- 5V

VDD = 5V

VDD

GND

RFB

IOUT1

IOUT2

C1

VOUT = 0 to +2.5V

1/2 AD8552

NOTES:

1ADDITIONAL PINS OMITTED FOR CLARITY

2C1 PHASE COMPENSATION (1pF-5pF) MAY BE REQUIRED

IF A1 IS A HIGH SPEED AMPLIFIER.

Figure 6. Positive Voltage output with minimum of

components.

ADDING GAIN

In applications where the output voltage is required to be

greater than VIN, gain can be added with an additional

external amplifier or it can also be achieved in a single

stage. It is important to take into consideration the effect

of temperature coefficients of the thin film resistors of the

DAC. Simply placing a resistor in series with the RFB

resistor will causing mis-matches in the Temperature

coefficients resulting in larger gain temperature coefficient

errors. Instead, the circuit of Figure 7 is a recommended

method of increasing the gain of the circuit. R1, R2 and

R3 should all have similar temperature coefficients, but

they need not match the temperature coefficients of the

DAC. This approach is recommended in circuits where

gains of great than 1 are required.

REV. PrD

–13–

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