AD5405 Просмотр технического описания (PDF) - Analog Devices

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AD5405

Dual 12-Bit, High Bandwidth, Multiplying DAC with 4-Quadrant Resistors and Parallel Interface

Analog Devices 

AD5405

SPECIFICATIONS1

VDD = 2.5 V to 5.5 V, VREF = 10 V, IOUT2 = 0 V. Temperature range for Y version: −40°C to +125°C. All specifications TMIN to TMAX, unless

otherwise noted. DC performance is measured with OP177, and ac performance is measured with AD8038, unless otherwise noted.

Table 1.

Parameter

Min

STATIC PERFORMANCE

Resolution

Relative Accuracy

Differential Nonlinearity

Gain Error

Gain Error Temperature Coefficient

Bipolar Zero-Code Error

Output Leakage Current

REFERENCE INPUT

Reference Input Range

VREFA, VREFB Input Resistance

8

VREFA-to-VREFB Input Resistance

Mismatch

R1, RFB Resistance

17

R2, R3 Resistance

17

R2-to-R3 Resistance Mismatch

Input Capacitance

Code 0

Code 4095

DIGITAL INPUTS/OUTPUT

Input High Voltage, VIH

1.7

1.7

Input Low Voltage, VIL

Output High Voltage, VOH

Output Low Voltage, VOL

VDD − 1

VDD − 0.5

Input Leakage Current, IIL

Input Capacitance

DYNAMIC PERFORMANCE

Reference-Multiplying BW

Output Voltage Settling Time

Measured to ±1 mV of FS

Measured to ±4 mV of FS

Measured to ±16 mV of FS

Digital Delay

10% to 90% Settling Time

Digital-to-Analog Glitch Impulse

Multiplying Feedthrough Error

Output Capacitance

Typ Max

12

±1

−1/+2

±25

±5

±25

±1

±15

±10

10 13

1.6 2.5

20 25

20 25

0.06 0.18

3.5

3.5

0.8

0.7

0.4

0.4

1

4 10

10

80 120

35 70

30 60

20 40

15 30

3

70

48

12 17

25 30

Unit

Bits

LSB

LSB

mV

ppm FSR/°C

mV

nA

nA

V

kΩ

%

kΩ

kΩ

%

pF

pF

V

V

V

V

V

V

V

V

μA

pF

MHz

ns

ns

ns

ns

ns

nV-sec

dB

dB

pF

pF

Conditions

Guaranteed monotonic

Data = 0x0000, TA = 25°C, IOUT1

Data = 0x0000, TA = −40°C to +125°C, IOUT1

Input resistance TC = −50 ppm/°C

Typ = 25°C, max = 125°C

Input resistance TC = −50 ppm/°C

Input resistance TC = −50 ppm/°C

Typ = 25°C, max = 125°C

VDD = 3.6 V to 5.5 V

VDD = 2.5 V to 3.6 V

VDD = 2.7 V to 5.5 V

VDD = 2.5 V to 2.7 V

VDD = 4.5 V to 5.5 V, ISOURCE = 200 μA

VDD = 2.5 V to 3.6 V, ISOURCE = 200 μA

VDD = 4.5 V to 5.5 V, ISINK = 200 μA

VDD = 2.5 V to 3.6 V, ISINK = 200 μA

VREF = ±3.5 V p-p, DAC loaded all 1s

RLOAD = 100 Ω, CLOAD = 15 pF, VREF = 10 V

DAC latch alternately loaded with 0s and 1s

Interface time delay

Rise and fall times

1 LSB change around major carry, VREF = 0 V

DAC latch loaded with all 0s, VREF = ±3.5 V

1 MHz

10 MHz

DAC latches loaded with all 0s

DAC latches loaded with all 1s

Rev. B | Page 3 of 24

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